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One Month AgoSaved
In-Office
2 Locations
Entry level
Entry level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Build pipelines that extract product knowledge from source code, APIs, file formats, and documentation into structured knowledge stores. Design ontologies, schemas, and knowledge graphs; develop parsers, typed interfaces, retrieval systems, and RAG layers; and decompose complex engineering workflows into callable operations. The role collaborates with domain engineers across multiple products and evaluates data quality, coverage, and schema completeness.
Top Skills: Ast ParsingAutogenCaeCfdCrewaiEltEmbeddingsETLFeaGraph DatabasesLangchainLanggraphLarge Language ModelsOwlProperty GraphsPythonRagRdfRest ApisVector Databases
One Month AgoSaved
In-Office
2 Locations
186K-345K Annually
Expert/Leader
186K-345K Annually
Expert/Leader
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Leads a processor design verification team responsible for verifying microprocessor cores and peripherals. Develops verification plans, simulation and emulation testbenches, diagnostics, assertions, coverage monitors, and automated verification flows. Drives coverage closure, collaborates with design, architecture, firmware, and verification teams, and manages work reporting for 7–10 engineers. Requires deep CPU architecture, SystemVerilog, UVM, gate-level simulation, assembly programming, and design verification leadership experience.
Top Skills: Assembly LanguageCComputer ArchitectureEmulationFormal VerificationGate-Level SimulationPerlSimulationSystemverilogUnix ShellUvm
One Month AgoSaved
In-Office
San Jose, CA, USA
115K-213K Annually
Mid level
115K-213K Annually
Mid level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Develop and improve UPF compilation software for Palladium and Protium platforms, focusing on performance, correctness, IEEE 1801 support, low-power verification flows, and documentation. Collaborate with R&D, PE, and AE teams to deploy UPF solutions across emulation and prototyping workflows. Contribute to compiler unification, self-checks, example-driven validation, and support for SystemVerilog, Verilog, and VHDL-based designs.
Top Skills: C++ClaudeCopilotCursorIeee 1801 UpfPalladiumPerlProtiumPythonSystemverilogTcl/TkVerilogVhdl
Reposted One Month AgoSaved
In-Office
Austin, TX, USA
Expert/Leader
Expert/Leader
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Lead architecture, development, and execution for Conformal logical equivalence checking and ECO technologies. Drive formal verification, scalability, performance, quality, debugging, and AI-powered innovation. Guide complex technical initiatives, resolve customer escalations, influence product strategy, collaborate across engineering and product teams, mentor senior engineers, and engage strategic semiconductor customers and partners.
Top Skills: Ai/MlCC++EcoEdaFormal VerificationLinuxLogic Equivalence CheckingLogic SynthesisPerlPythonRtl-To-Netlist VerificationShell ScriptingTclUnix
One Month AgoSaved
In-Office
San Jose, CA, USA
115K-213K Annually
Mid level
115K-213K Annually
Mid level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Lead development of low-power verification software for Cadence Palladium and Protium platforms. Responsibilities include enhancing UPF debugging, event logging, violation detection, IEEE 1801 support, documentation, AI-assisted debugging tools, and unified workflows across emulation and prototyping environments. The role requires collaboration with R&D, product engineering, and applications engineering teams, along with strong debugging, C++ code comprehension, RTL language knowledge, technical writing, and communication skills.
Top Skills: C++ClaudeCopilotCursorIeee 1801 UpfPalladiumProtiumSystemverilogVerilogVhdl
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One Month AgoSaved
In-Office
2 Locations
248K-372K Annually
Senior level
248K-372K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Build and manage sales pipelines for Design IP technology across North American accounts. Drive market penetration, adoption, revenue, and strategic sales plans while managing complex $1M+ licensing deals. Collaborate with engineering, marketing, legal, finance, executives, and EDA sales teams. Develop customer relationships from startups to enterprises, articulate IP value propositions, negotiate contracts, meet revenue targets, and provide market feedback to product leadership.
Top Skills: Connectivity IpEda SoftwareMemory Interface IpProtocol IpSemiconductor Ip
One Month AgoSaved
In-Office
San Jose, CA, USA
115K-213K Annually
Entry level
115K-213K Annually
Entry level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Develop and troubleshoot multithreaded, distributed physical synthesis software for Cadence’s Innovus platform. Collaborate with global R&D teams, product engineering, and technical sales to deliver customer solutions and workarounds. The role requires C/C++ development in Linux, strong data structures and algorithms knowledge, and customer communication skills. Experience with physical synthesis, timing analysis, multithreading, IC physical design tools, design closure, physical design flows, Tcl, and scripting is preferred.
Top Skills: CC++Innovus Implementation SystemLinuxTcl
One Month AgoSaved
In-Office
San Jose, CA, USA
161K-299K Annually
Senior level
161K-299K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Technical leader for Cadence’s Voltus power integrity and reliability platform. Owns advanced-node IR/EM signoff enablement, foundry and customer requirements, complex SoC/PDN issue resolution, modeling, product roadmap influence, and deployment. Partners across R&D, applications, field teams, marketing, customers, and foundries while mentoring engineering teams. Requires deep EMIR, PDN, digital physical implementation, CMOS, low-power design, scripting, and customer-facing technical leadership experience.
Top Skills: 3DicChipletsCmosElectrothermal AnalysisFinfetGaaInnovusIntegrityIr/Em AnalysisPdn AnalysisPythonQuantus/QrcTclTempusVoltus
One Month AgoSaved
In-Office
San Jose, CA, USA
161K-299K Annually
Senior level
161K-299K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Designs, develops, and maintains processor-generator infrastructure, build and delivery systems, database integrations, REST APIs, web applications, automated testing, and release processes. Builds Java and React applications, configures application servers, manages SQL and NoSQL databases, automates fulfillment, supports production operations, and collaborates across engineering, marketing, applications, and order-processing teams.
Top Skills: GitGrafanaJavaJavaScriptJenkinsLinuxNoSQLPerforcePerlPythonReactRest ApisShell ScriptingSQLTomcatTypescriptWindows
Reposted One Month AgoSaved
In-Office
San Jose, CA, USA
161K-299K Annually
Expert/Leader
161K-299K Annually
Expert/Leader
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
Leads North American cloud business development, technical pre-sales, customer engagements, and go-to-market execution for Cadence’s EDA cloud solutions. Develops cloud product roadmaps, business models, and sales pipelines while collaborating with sales, IT, R&D, and ecosystem partners. Evangelizes AI-driven EDA tools and applies generative AI to improve customer interactions and pre-sales support. Translates customer and industry needs into cloud product strategies and business growth.
Top Skills: Ai/MlCloud ComputingCloud ServicesConversational AiEdaGenerative AiGenerative Ai ChatbotsMicrosoft CopilotMultiphysics Modeling And SimulationPcb DesignPlmSaaS
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