Top Design Engineer Jobs

Lead analysis of current and next-generation DRAM/DDR memory technologies across electrical, thermal, power, and performance domains. Identify performance gaps, evaluate tradeoffs, and provide design guidance to architecture, firmware, validation, and product teams. Drive multi-functional alignment, deliver technical recommendations, and use AI tools to model design gaps and summarize data for strategy and decision-making.

Design, layout, simulate, and optimize DRAM memory circuits focusing on performance, power, area, and manufacturability. Develop schematics for arrays, control logic, decoders, datapaths, and test circuitry, validate designs via SPICE/Verilog simulations, integrate parasitics, and support test chip development and silicon validation with AI-enabled improvements.

The role involves designing, testing, and validating electrical systems for commercial aircraft, focusing on cabin systems integration and performance.

The role involves engineering support and project leadership in aerospace, focusing on interior design and compliance with regulatory standards.

Support H-47 Chinook airframe structural and payload design across the product lifecycle: document requirements, develop and modify designs using 3D CAD, support tests and supplier development, release detailed engineering, and coordinate with cross-functional engineering and production teams. Works under close supervision.

Design and develop repair solutions for Boeing-owned nacelle structures (inlet, fan cowl, thrust reverser, core cowl, exhaust). Lead urgent and longer-term repair projects, create/modify SRMs, prepare AMOC/8100-9 documentation, collaborate with customers, suppliers, and internal teams, and improve repair methods and processes to support 24/7 customer operations.

Lead design, development, integration, alignment, and testing of advanced optical systems for space, airborne, defense, and commercial customers. Work hands-on with optical hardware, procure and validate components, perform optical performance analysis and tolerancing, support subsystem integration and test, participate in design reviews, and contribute to proposals and technical papers.

The role involves architecting high-performance semiconductor memory test equipment, driving strategic development, collaborating across teams, mentoring, and influencing technical decisions to enhance testing infrastructure.

As a Member of Technical Staff, design and implement high-performance memory solutions for AI, focusing on microarchitecture, performance, power, and reliability.

Lead digital architecture and integration for advanced PHY prototypes, ensuring full chip ownership from definition to tape-out, leveraging expertise in RTL and SystemVerilog.

Lead end-to-end DRAM circuit design and optimization across memory array, control logic, datapath, and test logic. Perform SPICE and Verilog simulations, incorporate layout parasitics, evaluate power/performance/area trade-offs, define validation/test-chip strategies, and collaborate with cross-functional teams to enable manufacturable, high-performance DRAM products.

Design and develop primary and secondary flight structures and mechanisms for the Terran R rocket from concept through release. Create CAD models and drawings, perform packaging and tolerance analyses, integrate DFM choices with manufacturing, manage BOMs and configuration in PLM, and support fabrication and release activities using NX/Teamcenter.

As a Senior Design Engineer, you will design robotic hardware, conduct simulations, collaborate with teams, manage vendor relationships, and mentor junior talent.

Design, optimize, and verify analog and mixed-signal block-level circuits for DRAM. Propose new circuit topologies, expand verification and yield robustness, supervise analog layout and post-layout simulation, support silicon-to-simulation correlation, and collaborate with global teams and EDA/data science partners to leverage AI-assisted design flows.

Design and validate analog/digital circuits for memory products (HBM/DRAM). Perform schematic entry, layout, parasitic modeling, SPICE simulations, timing/area/power trade-off analysis, and collaborate across product, test, process, and CAD teams to ensure manufacturability and tape-out readiness.

Design, optimize, and verify analog and mixed-signal block-level circuits for DRAM. Improve circuit topologies, expand verification for yield, support post-layout simulation and silicon correlation, and apply AI/automation to boost design efficiency.

Design and simulate mixed-signal and PHY-adjacent circuit blocks for HBM, develop behavioral models (Verilog-A/AMS or SystemVerilog), run SPICE and mixed-signal simulations, support parasitic modeling and validation, collaborate on integration and silicon bring-up.

Entry-level DFT engineer supporting scan insertion, test-mode integration, ATPG readiness, MBIST validation, and DFT debug for HBM designs. Collaborates with RTL, DV, PD, and product/test teams to resolve integration issues and participate in build reviews.

Own and build production UI for a fund administration product: design and implement dense, high‑stakes financial workflows, prototype in code, define and maintain the design system, and create human–AI interaction patterns for human-in-the-loop review. Partner closely with product, ops, customers, and engineering to translate complex workflows into polished, trustworthy interfaces.

Design and verify digital circuits for NAND memory products. Develop RTL and schematics, perform gate-level and post-layout simulations, support netlist bring-up, collaborate on validation and silicon bring-up, and apply AI tools to streamline design tasks.

Lead development, layout, and optimization of high-speed datapath IO circuits for next‑gen NAND flash, driving AI-first workflows. Own architecture decisions, verify major IO blocks, redesign engineering workflows to embed AI, mentor teams, and collaborate across functions to meet aggressive data-rate and power targets.

Define micro-architecture for digital subsystems, implement RTL designs in SystemVerilog, collaborate with DV teams, and support post-silicon validation.

The Staff Design Engineer will debug silicon issues, collaborate cross-functionally, support design updates, and improve product quality for HBM products.

Design custom analog circuits focusing on PLL, DLL, and clock recovery, perform simulations, and support silicon verification for mixed-signal PHY.

As a Staff Design Engineer at Micron, you'll design and analyze digital and analog circuits for DRAM products, ensuring manufacturability and performance through collaboration and hands-on optimization.