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Provide technical support for backend digital implementation and signoff, guide customers on Cadence tools for P&R and timing/power closure, run evaluations and demos, script flows (Tcl/Perl/Python), collaborate with R&D to improve tools, and capture best practices to drive tool adoption.

Provide expert backend digital implementation and signoff support (place-and-route, timing and power closure). Guide customers on tool flows, run evaluations/benchmarks, develop and augment flows using scripting, collaborate with R&D to improve tools, deliver presentations/demos, capture best practices, and drive tool adoption.

Lead international tax planning, compliance, transfer pricing, and audit defense across APAC, Japan, Brazil, Canada, and Mexico. Advise on cross-border transactions, M&A, and Pillar Two/OECD matters; manage tax examinations, APAs, and regional tax teams; ensure timely filings, provisions review, and alignment with finance and legal stakeholders.

On-site post-silicon validation internship validating system-level and electrical performance of silicon test chips. Debug silicon issues with analog and digital design teams, run tests, automate test scripts, and deliver characterization reports to ensure product functionality and reliability.

Provide expert FEA/CAE technical support, develop CAE models and automation scripts, run benchmarks and evaluations, deliver trainings and demos, create technical documentation, and collaborate with sales, R&D, and marketing to expand Cadence product adoption.

Principal Applications Engineer for Cadence Serdes IP: define and architect high-speed interface solutions (PCIe, CXL, Ethernet, USB), demonstrate IP performance, lead technical presales, support customers, collaborate with sales/R&D/marketing, produce application notes, and drive process improvements. Occasional travel to customer sites and events.

Lead adoption of AI-driven backend physical design and timing signoff workflows using Innovus. Provide technical customer engagement, training, and troubleshooting for PnR, STA, floorplanning, placement, CTS, routing, and timing closure. Apply AI/ML and automation to improve design debug, flow automation, PPA, and turnaround time while coordinating AE, PE, and R&D teams for scalable solutions.

The Technical Program Manager will oversee R&D projects and customer engagements, ensuring effective project execution, stakeholder communication, and team collaboration.

Provide expert field applications engineering for digital implementation and signoff, guiding customers on Cadence synthesis, place-and-route, timing and power closure. Drive technical evaluations, demos, benchmarks, and tool adoption; collaborate with R&D to influence product direction and improve flows using scripting and best practices to meet PPA and design closure goals.

Manage and secure Active Directory and Windows server environments, perform audits, implement security practices, and troubleshoot authentication issues using PowerShell for automation.