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Reposted 24 Days AgoSaved
In-Office
Austin, TX, USA
Senior level
Senior level
Cloud • Hardware • Software • Semiconductor
Seeking a Senior Software Engineer to advance circuit simulation technologies. Responsibilities include R&D projects, algorithm development, and working within a cross-functional team.
Top Skills: C++Unix
Reposted 24 Days AgoSaved
In-Office
San Jose, CA, USA
154K-286K Annually
Mid level
154K-286K Annually
Mid level
Cloud • Hardware • Software • Semiconductor
The role involves driving innovations in analog mixed signal circuit design, requiring hands-on experience with relevant design and simulation tools.
Top Skills: AdeAnalog Mixed Signal Circuit DesignFinfet NodesPythonSkillSpectreVirtuoso Layout EditorVse
Reposted 24 Days AgoSaved
In-Office
2 Locations
12-12 Annually
Senior level
12-12 Annually
Senior level
Cloud • Hardware • Software • Semiconductor
Lead a team in the verification of digital RTL, develop reusable verification components, and manage verification plans and environments.
Top Skills: Cadence VmanagerJenkinsSystemverilogUvmVerilog Rtl
25 Days AgoSaved
In-Office
Bangalore, Bengaluru Urban, Karnataka, IND
Mid level
Mid level
Cloud • Hardware • Software • Semiconductor
The Lead Software Engineer will develop software using object-oriented languages, focusing on data structures, algorithms, and engineering principles, while collaborating across teams and improving customer success.
Top Skills: AlgorithmsC++Data StructuresJavaPythonSoftware Engineering Principles
25 Days AgoSaved
In-Office
Seoun-myeon, Anseong, Gyeonggi-do, KOR
Senior level
Senior level
Cloud • Hardware • Software • Semiconductor
The role involves working with the sales team on technical evaluations, managing projects, providing training, and addressing client queries.
Top Skills: LinuxTcl
25 Days AgoSaved
In-Office
Seoun-myeon, Anseong, Gyeonggi-do, KOR
Senior level
Senior level
Cloud • Hardware • Software • Semiconductor
Responsible for physical design implementation projects, including floor planning, power grid design, and timing closure, while collaborating with RTL design teams for successful tapeouts.
Top Skills: Asic Design FlowClock Tree SynthesisCrosstalk AnalysisDfmEm/Ir DropFloor PlanningPhysical Design ImplementationPlace And RoutePower Grid DesignTiming Closure
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