Top Tech Jobs & Startup Jobs

Develops and debugs ATPG and MBIST DFT patterns, supports post-silicon bring-up, and improves wafer sort and final-test yield. Responsibilities include scan diagnostics, failure analysis, repair debug, yield excursion root-cause analysis, silicon characterization, and correlation of electrical failures with fab data. The engineer partners with product and test engineering teams, performs volume data analysis, creates automated dashboards and wafer maps, and uses scripting and AI tools to identify process shifts and improve product yield and cost.

Design and verify CMOS I/O and analog/mixed-signal circuits, including references, op-amps, comparators, and power-on-reset circuits. Run AC/DC, signal integrity, jitter, power, reliability, and EMIR analyses. Collaborate with layout teams, create Verilog, Liberty, and IBIS models, document designs, and support chip integration and silicon bring-up. The role requires advanced-node CMOS expertise, knowledge of I/O protocols, and proficiency with Cadence Virtuoso and SPICE/Spectre simulation.

Leads an electrical engineering team developing and testing IO and analog mixed-signal IP. Oversees project delivery, technical troubleshooting, quality assurance, verification efficiency, resource allocation, documentation, and collaboration with global cross-functional teams and customers. Provides expertise in ESD, latch-up, transmitter and receiver architectures, analog circuits, and digital implementation flows while mentoring engineers and supporting diverse Broadcom business applications.

Drive Broadcom’s infrastructure software portfolio across major Japan and APAC enterprise accounts. Advise C-suite stakeholders, align cloud and infrastructure architectures with business outcomes, lead transformation engagements, develop AI, cybersecurity, and hybrid-cloud strategies, author thought leadership, and present at high-impact events. Build defensible TCO, ROI, and budget models while taking end-to-end ownership of complex strategic initiatives. The role requires deep technology expertise, executive credibility, Japanese and English fluency, Tokyo-based onsite work, and regional travel.

Design and develop high-speed analog circuits for electronic systems, conduct tests, analyze data, and select reliable components.

Design, develop, test, debug, and maintain low-level firmware, middleware, applications, diagnostics, and drivers for embedded optical PHY products. Collaborate with system, analog, and digital hardware teams; troubleshoot embedded C code; establish software architecture, coding standards, design patterns, and documentation practices; and help recruit and mentor engineering talent.

Verify high-speed interconnect ASICs throughout the product lifecycle at block and chip levels. Develop and maintain SystemVerilog UVM verification environments, understand IEEE Ethernet standards, collaborate with architecture, design, and firmware teams, and create scripting tools to improve verification efficiency and design quality.

Designs high-speed ASIC blocks for 10Gbps–400Gbps communication systems. Responsibilities include architecture, RTL/HDL coding, timing constraints, verification, synthesis, equivalency checking, CDC and lint reviews, power and design-for-test analysis, scripting, silicon bring-up, lab debugging, and production qualification. Collaborates with distributed engineering teams to define resources, schedules, validation plans, and design tradeoffs.

Designs and validates ASIC blocks for high-speed optical communication physical-layer products. Responsibilities include architecture, RTL coding, lint, CDC, synthesis, equivalence checking, timing analysis, simulation, silicon debug, verification planning, power and area tradeoffs, silicon bring-up, and ATE validation. Requires expertise in ARM subsystems, high-speed digital design, Ethernet and OTN networks, FEC, ASIC development flows, and design-for-power, test, and manufacturing.

Designs and validates high-speed analog and mixed-signal circuitry for data center connectivity applications. Responsibilities include developing novel CMOS circuit techniques, optimizing speed, power, and area, creating circuit models, performing simulation and custom layout, developing test plans, and characterizing and debugging designs for manufacturability. The role also requires analyzing experimental results, selecting reliable components, and understanding broadband communication SoC architectures.