Broadcom

I/O Design Engineer

Posted One Month Ago

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Hiring Remotely in Yishun, SGP

Remote

Senior level

Software • Semiconductor • Manufacturing

The Role

Design and verify CMOS I/O and analog/mixed-signal circuits, including references, op-amps, comparators, and power-on-reset circuits. Run AC/DC, signal integrity, jitter, power, reliability, and EMIR analyses. Collaborate with layout teams, create Verilog, Liberty, and IBIS models, document designs, and support chip integration and silicon bring-up. The role requires advanced-node CMOS expertise, knowledge of I/O protocols, and proficiency with Cadence Virtuoso and SPICE/Spectre simulation.

Summary Generated by Built In

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Job Description:

Role Overview

Broadcom’s Central Engineering Group is seeking an I/O Design Engineer with experience in analog and mixed-signal IC design. The candidate will contribute to the design and verification of a broad range of IP and I/Os, including leading-edge AI programs on advanced nodes. Joining a world-class team of engineers with a highly collaborative culture, the role offers opportunities for growth and development.

Responsibilities

Design of CMOS I/O, high-precision bandgap references, op-amps, comparators and power-on-reset circuits.
Run simulations to validate AC/DC performance, signal integrity, jitter and power.
Perform transistor reliability and EMIR analysis.
Work closely with layout teams to oversee physical design and verification.
Build Verilog, Synopsys Liberty and IBIS models.
Create and maintain detailed technical documentation, including datasheets, application notes and integration guides.
Support chip-level integration and silicon bring-up in test chips and customer products.

Technical Skills and Requirements

MS or PhD in Electrical Engineering.
6+ years of I/O or analog circuit design experience.
Deep proficiency in Cadence Virtuoso Schematic/Layout capture and SPICE/Spectre circuit simulation.
Solid foundation in I/O protocols including GPIO, I2C, I3C, eMMC, RGMII and SPMI.
Familiarity with ESD, EMI and Signal Integrity.
Experience with advanced CMOS FinFET and GAA process nodes, including features, technology limitations and PPA tradeoffs.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

Master’s or PhD degree in Electrical Engineering
6+ years of I/O or analog circuit design experience
Deep proficiency with Cadence Virtuoso schematic and layout capture
Deep proficiency with SPICE and Spectre circuit simulation
Knowledge of GPIO, I2C, I3C, eMMC, RGMII, and SPMI I/O protocols
Familiarity with ESD, EMI, and signal integrity
Experience with advanced CMOS FinFET and GAA process nodes

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

Equity Value & Accessibility — Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
Retirement Support — A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
Pay Growth & Progression — Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.