Top Tech Jobs & Startup Jobs

Lead developer relations with US national labs and federal research: build strategic collaborations, embed NVIDIA quantum SDKs, run workshops and trainings, present at conferences, create reference implementations, and relay research needs to product and engineering teams to drive adoption of CUDA-Q, cuQuantum, CUDA-Q QEC, and NVQLink.

Lead product strategy and execution for NVIDIA's DSX OS AI infrastructure software: collaborate with customers and engineering, track AI infrastructure trends, support product marketing and documentation, enable developer ecosystems, solicit feedback from model and platform builders, and coordinate executive launches and demos.

Manage corporate insurance and risk programs including exposure analysis for property, casualty, cyber, and management liability; lead renewals and loss-control implementation; support captive insurance operations and actuarial interpretation; manage claims and insurance during transactions; maintain certificates, records, and invoices; develop risk policies and use analytics/AI to drive mitigation and cost reduction.

Own and grow relationships with leading game studios, manage technical and commercial partnerships end-to-end, drive integrations of NVIDIA gaming technologies, negotiate and close deals, advocate partner needs to product teams, and coordinate go-to-market and marketing initiatives.

Build, scale, and harden deep learning training infrastructure for multi-thousand GPU clusters. Improve data loaders, distributed training, scheduling, and performance monitoring. Develop fault-resilient orchestration, training pipelines for massive video datasets, and collaborate with researchers and platform teams to maximize training efficiency, availability, and scalability.

Lead execution of SoC development from concept to production by coordinating IP design, integration, DFT, physical design, emulation, silicon bring-up and software teams. Track milestones, identify technical risks, drive mitigations, provide technical leadership, implement data analytics/automation to improve execution, and run after-action reviews to continuously improve workflows across a global, matrixed engineering organization.

Design and optimize high-speed, high-density ASIC package layouts and substrate breakouts. Perform pinout optimization, routing, placement, stack-up, power distribution, CAD library development, feasibility studies, and productivity methodology improvements while collaborating with package leads and cross-functional teams.

Design and perform physical layout for silicon interposers using Cadence Virtuoso; run DRC/LVS and verification (Calibre, ICV, Thunder); perform feasibility studies, floorplanning, custom layout, and collaborate with package, SI, and technology teams to meet schedule, cost, manufacturability, and electrical goals.

Design and implement map-based driving algorithms and in-vehicle systems, integrate map and perception data, develop transformer-based graph models and LLM evaluation frameworks, build automated map content analysis and scalable distributed map-building workflows.

Research and implement GPU-acceleration techniques for high-performance databases and ETL. Analyze and optimize data-intensive workloads, collaborate with hardware, systems, and research teams to influence next-generation architectures and programming models, and publish/share findings with customers and the community.