Senior DFT Engineer

Reposted 6 Hours Ago
Be an Early Applicant
Santa Clara, CA, USA
Hybrid
168K-311K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
The Role
Lead DFT/DFX architecture and methodologies across products, implementing test access, IO/memory BIST, scan compression, and high-speed test architectures. Define/prototype in-system test and ISO26262 diagnostics, support silicon debug and ATE bring-up, collaborate with cross-functional teams to productize test flows and tools, and mentor junior engineers on test designs and trade-offs.
Summary Generated by Built In

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work , to amplify human imagination and intelligence.  Make the choice to join us today.


Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips.


What you'll be doing:

  • As a member in our team, you will own and work with cross functional teams, implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan compression. In addition, you will help develop and deploy DFT methodologies for our next generation products.
  • You will have the chance to define, prototype and deploy next generation DFX architectures and methodologies across all our products. This includes high speed test access architectures, the in-system-test architecture, ISO26262 functional safety diagnostic for in-field testing and beyond, silicon debug & bring-up, productization, and silicon life-cycle management among others
  • As a member on our DFX Architecture team, your responsibility will be to craft key DFX architecture and methodologies to meet system level safety diagnostic test quality, in-field test quality, advanced defect screening and diagnosis to enable SLM for automotive, industrial, and robotics safety platforms etc.
  • Collaborate with multi-functional teams like system architecture, chip architecture, ASIC design, verification, CAD, VLSI, SW development, and Operations teams to productize new methodologies
  • Help the team with delivering efficient workflows and tools to help productize these features on industry's leading processors for deep learning, gaming, HPC and supercomputing
  • You will also help mentor junior engineers on test designs and trade-offs including cost and quality.

What we need to see:

  • BSEE (or equivalent experience) with 8+ years, MSEE with 5+ years of experience or PhD with 3+yrs in DFT or related domains
  • Demonstrated knowledge and expertise in defining scan test plans, BIST including memories and IOs, fault modeling, ATPG and fault simulation
  • Excellent analytical skills in verification and validation of test patterns and logic on complex and multi-million gate designs using vendor tools
  • Good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offs
  • Experience in Silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing, and test program development
  • Strong programming and scripting skills in Perl, Python or Tcl desired
  • Extraordinary written and oral communication skills with the curiosity to work on rare challenges

Our technology has no boundaries! NVIDIA is building the world’s most groundbreaking and state of the art compute platforms for the world to use. It’s because of our work that scientists, researchers and engineers can advance their ideas.  At its core, our visual computing technology not only enables an outstanding computing experience, but it is also energy efficient!  We pioneered a supercharged form of computing loved by the most demanding computer users in the world - scientists, designers, artists, and gamers.


NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to hear from you!


#LI-Hybrid

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
168,000 USD – 264,500 USD for Level 4; and 196,000 USD – 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until November 3, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Skills Required

  • BSEE with 8+ years, MSEE with 5+ years, or PhD with 3+ years in DFT or related domains
  • Knowledge and expertise in defining scan test plans, BIST (memory and IO), fault modeling, ATPG and fault simulation
  • Analytical skills in verification and validation of test patterns and logic on complex multi-million gate designs using vendor tools
  • Exposure to RTL and clocks design, STA, place-and-route and power trade-offs
  • Experience in silicon debug and bring-up on ATE including pattern formats, failure processing, and test program development
  • Strong programming and scripting skills in Perl, Python or Tcl
  • Extraordinary written and oral communication skills

NVIDIA Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about NVIDIA and has not been reviewed or approved by NVIDIA.

  • Equity Value & Accessibility — Company stock and RSUs have driven exceptional total compensation, with a generous employee stock purchase plan and ongoing equity refreshers playing a central role. Feedback suggests historic share-price gains created significant financial upside for many.
  • Healthcare Strength — Multiple plan options (HSA, PPO, and in some locations Kaiser) with in-network preventive care covered at 100% and company HSA contributions indicate a robust offering. Mental-health sessions and broad dental, vision, and disability coverage further strengthen the package.
  • Parental & Family Support — Up to 22 weeks of fully paid parental leave, adoption and surrogacy reimbursement, and coverage for IVF and egg freezing are highlighted as standout features. Additional family-care resources and caregiving support broaden the appeal.

NVIDIA Insights

Am I A Good Fit?
beta
Get Personalized Job Insights.
Our AI-powered fit analysis compares your resume with a job listing so you know if your skills & experience align.

The Company
HQ: Santa Clara, CA
21,960 Employees
Year Founded: 1993

What We Do

NVIDIA’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, NVIDIA is increasingly known as “the AI computing company.”

Similar Jobs

MosChip Logo MosChip

Senior DFT Engineer | California (Onsite)

Artificial Intelligence • Machine Learning • Semiconductor • Design
In-Office
Santa Clara, CA, USA
1200 Employees

Cisco Logo Cisco

Senior ASIC DFT DV Engineer (Hybrid)

Cloud • Information Technology • Internet of Things • Professional Services • Software
Hybrid
2 Locations
77500 Employees
149K-282K Annually

Cisco Logo Cisco

Senior ASIC DFT DV Engineer (Hybrid)

Cloud • Information Technology • Internet of Things • Professional Services • Software
Hybrid
San Jose, CA, USA
77500 Employees
149K-282K Annually

Altera (altera.com) Logo Altera (altera.com)

Design Engineer

Artificial Intelligence • Internet of Things • Machine Learning
In-Office
San Jose, CA, USA
1612 Employees
187K-271K Annually

Similar Companies Hiring

Unusual Machines, Inc. Thumbnail
Hardware • Robotics
Orlando, FL
300 Employees
Blee Thumbnail
Artificial Intelligence • Marketing Tech • Software
New York, New York
33 Employees
Vega Thumbnail
Artificial Intelligence • Automotive • Insurance • Transportation
US
65 Employees

Sign up now Access later

Create Free Account

Please log in or sign up to report this job.

Create Free Account