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Lead technical architecture for rack-scale AI systems with ODM and manufacturing partners. Define integration requirements, validation criteria, and launch readiness; create reference flows and guidance; provide escalation and technical alignment across NVIDIA teams and external partners; support NPI through production ramp and occasional travel for reviews and site support.

Verify GPUs by testing unit levels and contributing to verification methodologies. Collaborate with architecture teams to refine microarchitecture and support validation.

Architect and develop automated flows using C++ and Python. Collaborate on methodologies for chip builds, integrating with VLSI teams to resolve challenges.

The role involves optimizing CUDA kernels for geometric neural networks, building interfaces for PyTorch and JAX, and collaborating with research teams to develop GPU-accelerated software for scientific applications.

The role involves developing device drivers for network interface cards, optimizing software solutions, and addressing complex technical issues in the Linux kernel group.

Develop and improve NVIDIA GPU compiler back end: investigate issues, implement code generation improvements, and collaborate with global compiler, hardware, and application teams to emit high-performance GPU machine instructions for graphics and compute workloads.

The AI Hardware Architect will analyze and design next-generation AI hardware, focusing on microarchitecture, connectivity, and system performance for GPUs and CPUs.

Lead development of DFT power, thermal, and voltage-noise methodologies for datacenter GPUs. Drive post-silicon power/thermal analysis, deploy DFT solutions using applied ML/GenAI, partner with product and power architecture teams, and mentor junior engineers on test designs, trade-offs, and silicon bring-up on ATE/SLT platforms.

Lead robotics training data strategy: define formats and quality standards, oversee data collection/annotation, partner with researchers and external providers, build data acquisition plans, and deliver large-scale datasets and tooling to support robotics foundation models.

Lead invention of AI-driven ASIC development methodology, identify cross-stage bottlenecks, build scalable data pipelines, define metrics, mentor engineers, and evaluate AI/EDA research to improve predictability and cycle time.