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Design and physically integrate high-speed CMOS ASICs from concept through product release. Responsibilities include chip and block floor planning, routing, timing analysis and closure, memory, SerDes, I/O, test and clocking integration, custom and standard-cell design, power and signal integrity analysis, physical verification, and post-release debugging. The role also requires customer communication and collaboration with cross-functional teams.

Designs and integrates high-speed CMOS ASICs from concept through product release. Responsibilities include chip and block floor planning, routing, timing analysis and closure, memory, SerDes, I/O, test and clocking integration, custom and standard-cell design, and physical verification. The role also involves customer communication, cross-functional collaboration, debugging complex design issues, and balancing power, area, performance, and signal integrity requirements.

Designs and delivers ultra-high-performance electronic products through complete hardware ownership, including BOM creation, circuit and board design, development, validation, manufacturing support, customer trials, field issue resolution, and product sustaining. Collaborates with hardware, ASIC, signal, mechanical, thermal, diagnostic, packaging, manufacturing, and partner engineering teams. The role focuses on high-powered SoCs, advanced packaging, 1kW+ PCB power and thermal challenges, and 112G+ SerDes signaling.

Design, develop, and deliver firmware, embedded software, device drivers, microcode, and control software for datacenter-scale systems. Own projects throughout the product lifecycle, including bring-up, debugging, validation, automation, customer trials, field support, and production sustainability. Collaborate with multidisciplinary and partner engineering teams while contributing expertise in Linux, firmware, hardware interfaces, management protocols, secure boot, and datacenter networking. The role also involves mentoring and cross-functional collaboration.

Performs full physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floor planning, layout, and methodology development. Collaborates with RTL engineers and develops design flows using TCL and Perl. This is an on-site role in Colorado Springs.

Performs full physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floorplanning, layout, and methodology development. Collaborates with RTL engineers and works onsite in Colorado Springs.

Performs end-to-end physical IC design from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floor-planning, layout, and methodology development. Collaborates with RTL engineers and works on PCIe switch and enterprise storage products. This is an on-site role in Colorado Springs, Colorado.

Designs and implements high-performance digital IC RTL for PCIe switch and enterprise storage products. Responsibilities include architecture analysis, microarchitecture development, Verilog/SystemVerilog coding, timing closure, RTL debugging, third-party IP integration, cross-functional issue resolution, and silicon validation support. The role is fully onsite and supports advanced AI/ML data center ecosystems.

Develop and maintain low-level firmware for ARM-based storage controllers, focusing on RAID functionality and PCIe, NVMe, SAS, and SATA protocols. Responsibilities include feature design, implementation, debugging, log analysis, issue resolution, product validation, release support, and hardware integration. The engineer will troubleshoot firmware-hardware interactions using DSTREAM and logical analyzers and collaborate with hardware and validation teams throughout the development lifecycle.

Design complex flip-chip BGA packages for high-performance ASICs used in AI, networking, HPC, and 5G applications. Responsibilities include package layout, signal and power integrity, thermal performance, reliability, manufacturability, project scheduling, customer interface, and collaboration with internal and vendor teams. The role also supports process improvement, documentation, automation, and multi-project execution.