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The Staff AI Development Engineer will design agentic workflows, lead fullstack implementation of applications, mentor teams, and optimize AI-driven automation for various business units.

Design and implement physical layouts for power grids and interconnects, automate processes, and analyze high-speed signal interconnects for advanced IC technologies.

The ASIC Design Engineer leads design implementations, ensuring quality in multiple disciplines including synthesis, floorplanning, and timing closure with minimal supervision.

The ASIC Design Engineer is responsible for leading complex design implementations, ensuring quality through peer reviews, and adapting to technology changes.

The Digital Signal Processing Engineer will design DSP blocks for optical data center products, focusing on SerDes and high-speed data connectivity, utilizing skills in Verilog, Matlab, and high-speed signal processing.

Responsible for front end design and verification of ASIC design blocks, including architecture definition, logic design, synthesis, and verification through simulation and analysis of timing.

The Staff AI Development Engineer will design agentic AI solutions, implement fullstack applications, mentor teams, and optimize AI workflows and architecture in collaboration with infrastructure teams.

Lead DFT programs including specification, implementation, and verification for ASIC products, focusing on various phases of SoC DFT-related activities and customer interactions.

The Layout Engineer will develop and verify layouts for high-speed analog and mixed-signal circuits, focusing on power optimization and performance within state-of-the-art integrated circuits.

The Logic Design Engineer will design and verify high-performance Ethernet switch ASICs, including RTL implementation, verification, and debug analysis, while collaborating with the program lifecycle.