Top Tech Jobs & Startup Jobs

Responsible for front end design and verification of ASIC design blocks, including architecture definition, logic design, synthesis, and verification through simulation and analysis of timing.

Develops and deploys semiconductor timing sign-off flows using Python, Perl, Tcl, and Unix shell. Responsibilities include EDA flow development for PrimeTime, Tempus, Innovus, and RedHawk; automation; statistical data analysis and modeling; and support for chip design teams. The role requires advanced digital IC design expertise, strong communication, multitasking, problem-solving, and collaboration across projects.

Develop and deploy advanced timing sign-off methodologies for SOC, 3D/2.5D IC, and multi-die designs. Lead EDA flow development using Primetime, Tempus, and Innovus, while applying statistical analysis, silicon technology, testability, and yield expertise. The role requires extensive tapeout and timing sign-off experience, scripting and automation skills, cross-functional collaboration, and autonomous problem solving in a fast-paced engineering environment.

Design and validate high-power system enclosures and liquid cooling infrastructure across the hardware development lifecycle. Lead thermo-mechanical lab operations, thermal testing, simulation correlation, component validation, troubleshooting, and vendor collaboration. Design rack-mount systems, manage thermal solution suppliers, support compliance and reliability testing, and resolve thermal issues in high-power prototypes. Collaborate with electrical, manufacturing, compliance, and contract manufacturing teams to bring products from concept through volume production.

Designs system-level simulation methodologies and verifies transmitter full-chain performance for RF front-end modules. Integrates power amplifiers, switches, filters, and PCBs; automates simulation workflows; debugs system issues; and correlates simulation results with laboratory measurements. The role requires RFIC circuit design expertise, transceiver architecture knowledge, and proficiency with ADS, Cadence Virtuoso, Dynamic Link, Golden Gate, HFSS, and AI coding tools.

Lead the design, development, and deployment of automated RF and mixed-signal test solutions using C# and TestStand on PXI-based automated test equipment. Responsibilities include RF test development, system integration, hardware and software debugging, design-for-test feedback, mentoring junior engineers, and improving reusable, scalable test architectures throughout the NPI lifecycle.

Design, simulate and optimize high-speed DDR and chiplet I/Os and analog front-ends (RX/TX). Develop CTLE, VGA, DFE, slicers and transmitter circuits, oversee layout to minimize parasitics, validate via simulation and silicon analysis, troubleshoot issues, and produce design reports while collaborating with cross-functional teams.

Design and implement virtual CPU and memory features for Broadcom's VCF products. Work on low-level OS/kernel internals, x86_64 CPU virtualization, and related assembly/C code to enable CPU ISA updates, memory virtualization, and monitor architecture improvements.

Design, build, test, and debug mainframe security and compliance software on z/OS using IBM Assembler (HLASM). Collaborate in Agile with product teams, automate tasks, modernize enterprise mainframe solutions, and support/debug production systems.

Design and optimize mechanical aspects of ASIC packages using FEA. Collaborate with teams, conduct validations, and document designs across multiple projects.