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Manage wafer start execution across fabs and foundries using data analytics and cross-functional collaboration. Drive solution development, change management, customer communications, and KPI monitoring. Be a power user of JDA and SAP planning tools, analyze reports, present SCM metrics to senior management, and identify creative solutions to improve delivery, productivity, and profitability.

Lead functional architecture and transformation of fab-focused supply chain planning across front-end semiconductor manufacturing. Design planning logic and systems (Order Promiser, Enterprise Supply Planner), align SAP/MES integrations, govern capacity and wafer-start decisions, drive change management, analytics, and mentor teams to improve service, cycle time, inventory, and factory performance.

Lead Facilities category procurement: develop category strategy, partner with stakeholders, manage suppliers and performance, run RFP/RFQ and contract negotiations, provide market intelligence, mitigate supply risk, and drive cost savings and spend optimization.

Design and simulate transistor-level analog/mixed-signal IC blocks (amplifiers, converters, power circuits), define architectures, integrate blocks into mixed-signal systems, present results to teams/customers, support layout, lab evaluation and test, mentor others, and improve design methodologies to meet power, timing and functional objectives.

The Senior Principal Engineer will architect digital data paths for high-speed CMOS ICs, develop calibration algorithms, and lead design integration for broadband communication systems.

Analyze internal and external datasets to identify macro demand indicators, incorporate macro signals into forecasting, guide forecast biasing, interpret ML outputs, and deliver actionable market insights to planning, FP&A, and leadership.

Lead methodology improvements for physical design across complex chips and SoC programs. Develop and automate physical design flows, define best practices, analyze QoR (power, performance, area, timing, congestion), debug recurring implementation issues, and enable cross-functional teams (CAD, STA, DFT, RTL) to adopt scalable, repeatable methodologies. Provide technical guidance and targeted implementation support to validate and deploy improvements.

The Staff Analog Design Engineer leads the design and development of complex analog and mixed-signal ICs, mentors junior engineers, and ensures successful project delivery through cross-functional collaboration.

The Senior AI/ML Applications Engineer will develop, integrate, and support AI-driven tools for IC design and verification, focusing on agentic AI methods to enhance productivity.

Develop and execute sourcing strategies for front-end fab equipment, services, spares, and supplier support. Lead commercial negotiations, translate technical requirements into sourcing plans, manage stakeholders, mitigate supply risk, and drive cost, quality, and output improvements across ADI fabs.