Top Tech Jobs & Startup Jobs

Lead verification strategy and plans for blocks and SoCs; develop SystemVerilog/UVM environments; coordinate and lead verification activities; debug RTL functional issues; improve verification methodology and manage coverage and regressions.

Lead and define verification strategies and plans for digital/SoC blocks, develop SystemVerilog/UVM environments, debug RTL functional issues, coordinate verification activities, and improve verification methodology.

Lead product and ATE test engineering for silicon bring-up through RTM. Define DfT/test requirements, design low-cost ATE hardware, develop test programs, debug post-silicon issues, run DOE and qualification cycles, own test solutions and metrics, and collaborate with cross-functional teams to ensure successful product ramp.

Coordinate expedited, critical shipments from the Asia Command Center: set priorities for line‑down deliveries, select optimal/premium shipping methods, liaise with factories, customer service, global distribution centers and freight forwarders, monitor end‑to‑end shipments, and support cross‑regional command centers.

Lead new product development for analog/mixed-signal/digital ICs, define DfT and test strategies, develop low-cost ATE test solutions and low-level code, own post-silicon bring-up, validation, qualification, and drive test-cost, yield, and quality targets across product lines.

Provide confidential executive support to a VP and leadership team: manage complex calendars and travel, coordinate meetings and communications, prepare expenses and documentation, support Teams/SharePoint and office operations, handle vendor/PO tasks, assist onboarding/offboarding and international shipment compliance, and drive process improvements while maintaining professionalism and discretion.

Lead Americas mass-market regional marketing and business development to drive customer engagement, design-ins/wins, and revenue growth. Build executive and engineering relationships with customers, distributors, and cross-functional teams; run regional programs, events, and funnel management; influence product roadmaps through market intelligence; and travel extensively to support strategic initiatives across the Americas.

Lead and manage an analog/mixed-signal design team to develop power-management and clock-management CMOS IP. Drive circuit design, layout, verification, DFT strategy, lab debug, validation support, documentation, cross-functional coordination, and mentor junior engineers to deliver production-quality IP on schedule.

Lead development, verification, layout, and characterization of advanced analog and mixed-signal CMOS IP (bandgaps, amplifiers, LDOs, PLLs, etc.). Drive specifications, debug in lab, perform bench characterization, collaborate with cross-functional teams, mentor junior engineers, and ensure designs meet performance, power, reliability, and production release goals.

Perform reliability evaluation and failure analysis of drivetrain power modules for automotive EVs. Apply AQG324 power-cycle stress strategies, configure and debug power-cycle and fluid delivery test systems, run reliability tests (PCT, HTRB, HTGB, SCIS, UIS), generate stress reports, and collaborate with cross-functional teams to support qualification and lifetime assessment.