Top Tech Jobs & Startup Jobs

Drive Broadcom’s infrastructure software portfolio across major Japan and APAC enterprise accounts. Advise C-suite stakeholders, align cloud and infrastructure architectures with business outcomes, lead transformation engagements, develop AI, cybersecurity, and hybrid-cloud strategies, author thought leadership, and present at high-impact events. Build defensible TCO, ROI, and budget models while taking end-to-end ownership of complex strategic initiatives. The role requires deep technology expertise, executive credibility, Japanese and English fluency, Tokyo-based onsite work, and regional travel.

Design and develop high-speed analog circuits for electronic systems, conduct tests, analyze data, and select reliable components.

Design, develop, test, debug, and maintain low-level firmware, middleware, applications, diagnostics, and drivers for embedded optical PHY products. Collaborate with system, analog, and digital hardware teams; troubleshoot embedded C code; establish software architecture, coding standards, design patterns, and documentation practices; and help recruit and mentor engineering talent.

Verify high-speed interconnect ASICs throughout the product lifecycle at block and chip levels. Develop and maintain SystemVerilog UVM verification environments, understand IEEE Ethernet standards, collaborate with architecture, design, and firmware teams, and create scripting tools to improve verification efficiency and design quality.

Designs high-speed ASIC blocks for 10Gbps–400Gbps communication systems. Responsibilities include architecture, RTL/HDL coding, timing constraints, verification, synthesis, equivalency checking, CDC and lint reviews, power and design-for-test analysis, scripting, silicon bring-up, lab debugging, and production qualification. Collaborates with distributed engineering teams to define resources, schedules, validation plans, and design tradeoffs.

Designs and validates ASIC blocks for high-speed optical communication physical-layer products. Responsibilities include architecture, RTL coding, lint, CDC, synthesis, equivalence checking, timing analysis, simulation, silicon debug, verification planning, power and area tradeoffs, silicon bring-up, and ATE validation. Requires expertise in ARM subsystems, high-speed digital design, Ethernet and OTN networks, FEC, ASIC development flows, and design-for-power, test, and manufacturing.

Designs and validates high-speed analog and mixed-signal circuitry for data center connectivity applications. Responsibilities include developing novel CMOS circuit techniques, optimizing speed, power, and area, creating circuit models, performing simulation and custom layout, developing test plans, and characterizing and debugging designs for manufacturability. The role also requires analyzing experimental results, selecting reliable components, and understanding broadband communication SoC architectures.

Executes the full physical IC design cycle from RTL through silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floorplanning, layout, and methodology development. Collaborates with RTL design engineers and applies TCL/Perl scripting and EDA tools. This is an in-person role in Colorado Springs, Colorado.

Design and develop analog/mixed-signal integrated circuits for high-speed data communication, perform transistor-level design and layout, investigate architectures, and characterize and debug prototype and production ICs in the laboratory.

Supports Tier 1 customers using Broadcom InP optical components, providing pre-sales and post-sales assistance, customer architecture analysis, product debugging, and launch support. Develops expertise in high-speed EML/PD and CW DFB products for AI and datacenter applications. Collaborates with field applications engineering, sales, marketing, production, quality, and development teams, while conducting customer visits and contributing to product definition and roadmap activities.