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The Product Engineer will serve as a Technical Evangelist for Analog Design Environment tools, engaging with customers and R&D to enhance product capabilities and resolve issues.

Develop EDA tools focusing on transistor level analysis and enhance existing architectures using machine learning for efficiency improvements.

Cadence is offering a 16-week paid returnship for Physical Design Application Engineers to update skills and re-enter the workforce after caregiving. Candidates will work with EDA tools on Digital Synthesis, Place and Route, and Signoff Analysis.

Lead technical campaigns and support sales by delivering workshops and training, utilizing expert knowledge in signal and power integrity for IC and PCB designs. Collaborate with R&D and ensure customer success through effective communication and problem-solving.

The Software Architect will re-architect the Protium compiler, improve performance through efficient C++ coding, multi-threading, and optimization, and write design specs and unit tests.

Develop and enhance the Protium FPGA-Based Prototyping product by implementing algorithms in C/C++, writing specifications, and collaborating on EDA automation.

The role involves performing static timing analysis, glitch and noise analysis, automation of flows, and technical training with extensive experience in timing analysis methodologies.

Manage and optimize OpenStack and Nutanix environments, ensuring high availability, scalability, and compliance while collaborating across teams and documenting processes.

The Principal Digital Design Engineer will develop high-performance physical IP, contribute to digital architecture and RTL, and coordinate with multiple teams for project execution.

Responsible for power design and hardware system platform sustainment. Works with mechanical teams on power delivery and collaborates with vendors for PDU and PSU design.