Top Tech Jobs & Startup Jobs

Develop AI/ML technologies and tools to accelerate standard-cell library characterization. Build infrastructure for characterization data mining and model library cells for aging and variation effects. Maintain and enhance C++ applications on Unix/Linux, design data structures and algorithms, and follow software quality and engineering processes.

Design and build scalable EDA flows and AI/LLM-driven automation for 3DIC, interposer, and RDL systems. Implement flow-generation, debugging assistants, root-cause analysis, and platform integration using C++, Tcl, Python, and Java. Collaborate with engineering teams to validate flows, automate constraint-driven designs, and address large-scale, high bump-count and multi-region routing challenges to deliver production-quality solutions.

Lead Front End Design projects, mentoring RTL engineers, define IP features, write and optimize RTL code, oversee pre-silicon verification, and collaborate with cross-functional teams.

The role involves designing, developing, and supporting FPGA prototyping compiler software, optimizing code, and addressing customer issues.

Lead development of scalable EDA flows and AI/LLM-driven automation for 3DIC, interposer, and RDL systems. Build flow-generation, debugging assistants, root-cause analysis, and platform integration using C++, Tcl, Python, and Java. Collaborate across teams to define requirements, validate behavior, and deliver production-quality, automated workflows improving usability and debug efficiency for complex package and system-level designs.

Design and implement firmware for high-speed SERDES PHYs across architecture, implementation, verification, and post-silicon validation. Build prototype control software for adaptation/equalization algorithms, debug with verification and validation teams, support electrical/system characterization and customer deployment, and deliver firmware fixes with product and design teams.

Lead product strategy, roadmap, and go-to-market for PCIe and CXL Controller IP. Define requirements, build competitive positioning and sales enablement, engage customers and ecosystem partners, support design-wins, track standards, and produce technical marketing collateral to drive adoption across AI/HPC, data center, automotive, and SoC/chiplet applications.

Design and implement C/C++ software and OS-level environment for the Palladium emulation platform. Write feature and test specifications, implement unit/integration/system tests, collaborate across teams, and optimize algorithms and performance. Work may include Linux/kernel drivers, multithreading, and TCP/IP networking.

The Sr Application Engineer Architect will lead Cadence's technical engagement with semiconductor clients, mentor teams, drive innovation, and establish best practices.

The Quantum Product Engineer will develop Quantum Design Automation solutions, conduct circuit simulations, oversee layout implementation, and analyze superconducting quantum hardware.