Top Tech Jobs & Startup Jobs

The Principal Kubernetes Software Engineer will design and develop features for Kubernetes, contribute to CNCF projects, lead teams, and mentor engineers while ensuring adherence to architecture, security, and compliance standards.

Design and verify memory compilers and custom memory macros (SRAM, register-files, ROM). Perform transistor-level design and simulation, layout extraction, post-layout verification, floorplanning and physical integration, characterization and automation, silicon test plan definition, and silicon debug. Document specifications and models.

Lead product lifecycle and go-to-market for Broadcom's PCIe switch portfolio. Define roadmap and ecosystem strategy for AI/ML server topologies, engage hyperscalers and OEMs, translate architecture requirements into hardware/software features, coordinate cross-functional teams, and drive pricing, enablement, and product P&L outcomes.

Design, test, and optimize RF front-end modules for wireless standards (W-CDMA, LTE, 5G, Wi‑Fi). Lead measurement setup, characterization, DoE, debugging, tuning, and performance optimization. Contribute to FEM architecture and semiconductor process development, using RF test equipment and programming for data analysis.

Design and develop memory compilers and circuit blocks, analyze architectures, simulate designs, and debug silicon issues.

The R&D Engineer will verify complex switch designs, create verification environments using SystemVerilog, execute test plans, and develop ATE testing vectors and C-based diagnostics for silicon testing.

Senior solution engineer responsible for strategic and tactical engagements with large enterprise customers to drive adoption of PPM and Agile management solutions. Perform value alignment, demos and proofs of value, present solution and adoption roadmaps, document requirements, lead account engagements and team members, and collaborate with Sales, R&D, Services and management to ensure solution consistency and customer success.

Develop high-quality software and lead the Mainframe Security and Compliance team. Responsibilities include coding, testing, mentoring, and collaborating with product stakeholders.

Lead IT and operational audit engagements, perform SOX/ITGC testing, assess control deficiencies, support remediation and attestations, coordinate with external auditors, and advise IT/Finance on control improvements and emerging risks such as AI governance.

Lead top-level ASIC floorplanning and physical design from RTL to tape-out. Own chip floorplanning, partitioning, clock tree delivery, I/O/bump planning, cross-functional integration, vendor/IP evaluation, and methodology improvements.