Top Tech Jobs & Startup Jobs

Design and enable advanced semiconductor packaging processes, perform feasibility studies and simulations, optimize materials and equipment, apply SPC, data analytics and ML to improve yield and stability, collaborate with suppliers and cross-functional teams to scale technologies for high-volume manufacturing.

Develops ESD and latch-up reliability solutions and design rules for semiconductor technologies. Designs test structures, plans experiments, performs TLP-based ESD characterization, analyzes test data, and documents findings. Supports test-chip layout, VLSI circuit design, transistor characterization, and ESD modeling. Consults with analog design teams to identify and address ESD risks, while publishing design rules for internal and foundry teams.

Design and implement software for Intel quantum hardware, research quantum error correction protocols, evaluate hardware/software trade-offs, and collaborate with quantum hardware, software, algorithm, and application teams. Provide technical leadership, promote software engineering best practices, deliver high-quality tools, assess technical feasibility, prioritize development, and track industry advancements in fault-tolerant quantum computing.

Designs and optimizes custom and compiler-based embedded memory solutions for high-performance, low-power CPUs and SoCs. Responsibilities include SRAM, cache, register file, ROM, memory array, bit-cell, and peripheral circuit design; characterization and simulation; critical-path analysis; PPA optimization; automation; methodology development; and cross-functional collaboration with architecture, layout, process, physical design, and validation teams.

Perform SoC-level static timing analysis, timing constraint development, timing closure, clock network optimization, and PVT analysis for advanced semiconductor designs. Collaborate with architecture, logic design, clocking, DFT, and physical design teams to resolve timing violations, optimize performance and power, develop timing models, and improve design methodologies, tools, and flows. The role also requires technical leadership, cross-functional communication, mentorship, and ownership of complex engineering challenges.

Develop and optimize Intel SHMEM, MPI, MPICH, and oneCCL communication libraries for low latency, high bandwidth, and reliability. Collaborate with cross-functional teams to define software requirements, debug across hardware and software layers, and support high-performance scientific computing and machine learning on Intel CPUs and GPUs.

Design and execute comprehensive verification plans and UVM-based testbenches for CPU microarchitecture. Perform functional coverage analysis, system-level simulation, root-cause debugging, and develop automation scripts to optimize verification flows while collaborating with architects, RTL designers, and physical design teams.

Develop and implement software and database solutions for Intel’s automated manufacturing factories. Responsibilities include gathering requirements, analyzing manufacturing processes, testing and deploying application releases, configuring manufacturing execution systems, troubleshooting complex issues through Tier 3 support, documenting processes, and managing continuous improvement projects. The role involves cross-functional collaboration with manufacturing, engineering, and software development teams and participation in a 24/7 on-call rotation.

Develop and integrate semiconductor package assembly processes for Intel’s advanced packaging programs. Manage baseline data, DOE plans, qualification, yield improvement, process and design-rule validation, and die-package interaction studies. Coordinate substrates, materials, schedules, and cross-functional working groups while using statistical problem-solving methods to improve quality, cost, and manufacturing performance. Occasional travel is required, and the role is performed onsite in Phoenix, Arizona.

Leads post-silicon characterization, certification, and technology-readiness activities for SRAM, Register File, and fuse arrays. Develops Vccmin/Vmax predictive models, analyzes large semiconductor datasets, evaluates silicon-to-simulation correlation, assesses risks, and improves certification methodologies. Collaborates cross-functionally with design, device, process, test, yield, and reliability teams to resolve technical challenges and support PDK releases and product deployment. Presents findings to leadership and provides technical mentorship.