Package Assembly Process Development Integration Engineer

Posted 7 Days Ago
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Phoenix, AZ, USA
In-Office
89K-171K Annually
Mid level
Artificial Intelligence • Cloud • Information Technology • Software
Creating world-changing technology that enriches the lives of every person on earth.
The Role
Develop and integrate semiconductor package assembly processes for Intel’s advanced packaging programs. Manage baseline data, DOE plans, qualification, yield improvement, process and design-rule validation, and die-package interaction studies. Coordinate substrates, materials, schedules, and cross-functional working groups while using statistical problem-solving methods to improve quality, cost, and manufacturing performance. Occasional travel is required, and the role is performed onsite in Phoenix, Arizona.
Summary Generated by Built In
Job Details:

Job Description: 

Job Description

As a Process Integration and Yield Engineer at Intel, you will play a pivotal role in driving technology transfer and optimizing manufacturing processes. You will define process integration roadmaps, establish workflows, and ensure continuous improvement. By leveraging data-driven insights and collaborating with stakeholders, your work will directly contribute to enhancing product quality, yield, and overall operational excellence.

The Assembly Package Test Manufacturing (APTM) organization owns a fundamental and fast-growing portion of Intel's foundry business. In addition to traditional product types, we drive Intel's advanced packaging strategy. In the Package Assembly Process Development Integration Engineer role, you will be part of the Arizona Package Assembly Development Integration team within APTM owning development activities and running working groups and task forces to address key risks for key Intel Advanced Packaging Programs.
Key Responsibilities

- Manage development and baseline data collection activities (for TV and Products).
- Key contact for process level issues within package assembly
- Manage DOE plans and data collection activities that support key technology development areas related to die-package interactions, process flow development and qualification, yield improvement, process spec validation, design rule validation, identify and implement cost effective wafer level / assembly / substrate solutions that enable a robust die-package process and architecture.
- Manage substrates and materials to meet forecasted costs and schedule.
- Engage and work closely with stakeholders to deliver holistic solutions to the problems.
- Develop solutions to problems utilizing statistical knowledge and problem-solving tools.
- Achieve timely results by working across organizational boundaries, fostering an inclusive and innovative culture.

The successful candidate should be willing and able to travel occasionally, as required to support the needs of the business.

The candidate should exhibit the following behavioral traits:

- Exceptional communication skills.
- Collaboration
- Innovative thinking
- Attention to detail
- Proactive problem-solving
- Curiosity and continuous learning
- Make technical decisions and provide technical direction
- Effectively work in a highly networked, cross organization role
- Exhibit strong team building and influencing skills

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

Candidate must possess a Bachelor’s degree with 3+ years of experience, OR Master's Degree with 2+ years of experience, OR PhD degree in Engineering with 1+ years of experience.

The experience listed above should be in any of the following:

  • Semiconductor experience
  • Manufacturing experience
  • Advance assembly packaging experience

Preferred Qualifications

3+ years of experience in the following:

  • Focus on fundamental understanding of advanced packaging process development.
  • Knowledge of Package Assembly NPI methodology, DOE and statistical Process control.
  • Knowledge of characterization techniques such as CSAM, Xray, XPS, FTIR, SEM, EDX.
  • Experience in package design, assembly process interaction is a plus.

          

Job Type:College Grad

Shift:Shift 1 (United States of America)

Primary Location: US, Arizona, Phoenix

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.



Annual Salary Range for jobs which could be performed in the US: $89,010.00-170,630.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills Required

  • Bachelor's degree with 3 or more years of experience, or master's degree with 2 or more years of experience, or PhD in Engineering with 1 or more years of experience
  • Semiconductor experience
  • Manufacturing experience
  • Advanced assembly packaging experience
  • Fundamental understanding of advanced packaging process development
  • Knowledge of package assembly NPI methodology, DOE, and statistical process control
  • Knowledge of characterization techniques including CSAM, X-ray, XPS, FTIR, SEM, and EDX
  • Experience in package design and assembly process interaction

Intel Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.

  • Leave & Time Off Breadth Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
  • Parental & Family Support Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
  • Healthcare Strength Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.

Intel Insights

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The Company
HQ: Santa Clara, CA
75,000 Employees
Year Founded: 1968

What We Do

Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside. With more ingenuity and creativity inside, our work is at the heart of countless innovations. From major breakthroughs to things that make everyday life better— they’re all powered by Intel technology. With a career at Intel, you can help make the future more wonderful for everyone.

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