Top Tech Jobs & Startup Jobs

The role involves leading wet etch and cleans development, focusing on advanced logic process integration and mentoring engineers.

Develop and optimize RF and analog test solutions from feasibility through production. Design test boards, perform ATE and bench characterization, debug functionality and performance, correlate ATE-to-DV, tune thermal and power recipes, and develop software to drive advanced test equipment to ensure product quality and yield.

Design and optimize CPU logic and RTL, write and simulate RTL for CPU IP blocks, meet PPA and timing goals, ensure physical design integrity, review verification plans, document microarchitectural specs, and collaborate with SoC customers for integration.

Lead cross-functional efforts to advance circuit simulation and modeling for advanced foundry technologies. Partner with EDA vendors to enhance and validate simulation tools and flows, align capabilities with technology and VLSI physical design roadmaps, and drive readiness of high-quality simulation and modeling solutions for timely PDK delivery.

Design, develop, and maintain automated wafer-level test systems and test software for silicon photonics devices. Implement test algorithms, collaborate with device designers and data teams, create procedures and documentation, train technicians, and troubleshoot to improve system performance, reliability, and throughput in production environments.

Lead development of advanced-node overlay processes: design, execute, and analyze experiments; troubleshoot overlay mark performance; integrate process flows; transfer technology to manufacturing and contribute to IP and ramp-to-volume.

The role involves designing experiments to characterize silicon spin qubits, performing electrical measurements at cryogenic temperatures, and analyzing device performance data.

The Physical Verification Engineer supports layout verification and parasitic extraction for Intel, ensuring successful design implementations and quality improvements. Responsibilities include technical content development, customer support, and leading verification methodology optimization for CMOS processes.

Lead board-level reliability strategy, qualification planning, and failure analysis for advanced semiconductor packages. Develop test plans (thermal, mechanical, humidity, power), perform reliability statistics (Weibull, DOE), drive root-cause investigations and corrective actions, and represent the company in JEDEC and other industry standards committees.

Design, build, and maintain cloud-native applications and distributed systems for semiconductor test operations. Manage hybrid infrastructure (cloud and on‑prem), Kubernetes clusters, CI/CD, automation, monitoring, and incident response. Provide architecture, operational support, documentation, and reliability improvements while ensuring security and compliance.