Top Tech Jobs & Startup Jobs

Leads cross-functional global teams through semiconductor new-product development from opportunity assessment to market release. Manages schedules, budgets, qualification plans, manufacturing coordination, reliability testing, failure analysis, and production ramp while ensuring quality and return on investment. Provides project updates to senior management, coordinates design and manufacturing organizations, and drives execution across fabrication, assembly, test, engineering, marketing, and quality teams.

Designs and verifies RTL for USB 2.0 and eUSB2 hubs, hosts, and bridges. Responsibilities include digital logic design, DFT, high-speed communication chip evaluation and debugging, test method development, technical documentation, and collaboration with analog and digital engineering teams. The role interfaces digital circuits with analog circuitry and supports product specifications, application materials, demo boards, and complex problem solving.

Design and architect digital IP for embedded processors, from requirements and microarchitecture through RTL implementation, verification, silicon bring-up, and production release. Responsibilities include optimizing IP for area, power, and performance; collaborating with SoC, verification, validation, test, systems, applications, and marketing teams; managing third-party IP vendors; debugging functional and silicon issues; and ensuring quality through lint, CDC, synthesis, simulation, and timing-closure processes.

Supports high-volume semiconductor manufacturing by selecting, installing, upgrading, maintaining, and improving CMP equipment. Analyzes equipment performance and reliability, performs lot and equipment dispositions, develops uptime and problem-resolution solutions, supports repair and process engineering teams, and defines preventive maintenance schedules. The role requires collaboration across manufacturing functions in a 300mm wafer fabrication environment, with emphasis on equipment reliability, production continuity, cycle-time reduction, and semiconductor cleanroom practices.

Develop, characterize, simulate, and optimize BiCMOS SiGeC HBT devices for RF and mm-wave volume production. Lead process and device simulations, experiments, RF/DC characterization, data analysis, and manufacturability improvements while collaborating across integration, reliability, packaging, circuit design, test, and product teams. Manage multiple technical projects, schedules, stakeholder communications, and cross-functional engineering efforts.

Leads the APAR Analytics and Compliance organization, building teams and strengthening financial operations through analytics, process improvement, automation, payments technology, controls, risk management and compliance. Establishes KPIs, data governance, predictive monitoring and scalable systems while overseeing SOX, PCI DSS and global regulatory requirements. Partners with Finance, IT, Audit and business teams on transformation initiatives, vendor management and payment infrastructure.

Leads heterogeneous integration process development for silicon photonics, including non-silicon chiplet bonding, post-bond processing, waveguide etching, process control, yield improvement, reliability, and manufacturing scale-up. Collaborates with fab operations, design, packaging, vendors, and product engineering teams to develop cost-effective, high-volume photonic manufacturing solutions. The role also develops characterization methods, process monitors, documentation, and advanced techniques for high-speed photonic devices.

Drives GaN technology integration and development across process, device, testing, product, quality, reliability, packaging, and manufacturing teams. Responsibilities include process and device characterization, design of experiments, data analysis, simulation, parametric performance improvement, failure analysis, product flow development, short-flow and test-chip development, OPC validation, and technology transfer and qualification. Requires cross-functional technical leadership and effective schedule and project management.

The Process Integration Engineer will lead technology development for advanced semiconductor processes, focusing on integration issues, improvements, and collaboration with cross-functional teams.

Develops and implements semiconductor test strategies, plans, programs, and ATE hardware for mixed-signal power management devices. Responsibilities include silicon characterization, debugging, failure analysis, yield improvement, test-time optimization, statistical analysis, qualification, and production release. The engineer collaborates with design and manufacturing teams to deliver robust, cost-effective test solutions for DCDC converter products.