Top Tech Jobs & Startup Jobs

Lead analog and mixed-signal IP design, verification, and integration for Wi-R SoCs. Drive RF IC architecture through post-silicon bring-up, collaborate with firmware/digital/board teams, mentor junior engineers, and publish technical results. Own end-to-end chip development and long-term technical strategy for ultra-low-power wireless silicon.

Lead and grow a world-class IC design organization across analog, mixed-signal, RF, and digital domains. Own end-to-end chip lifecycle from concept through GDSII, tapeout, bring-up and production. Set architecture and technical standards, guide EDA tool and vendor engagements, integrate IP, coordinate with hardware/firmware/product teams, hire and mentor engineers, and represent engineering in executive strategy and partnerships.

Lead bare-metal bring-up of Wi-R SoCs and Cortex-M/RISC-V platforms, develop and optimize ultra-low-power firmware stacks (I2C, SPI, BLE, DMA, sensor drivers), deliver a production-ready firmware SDK, debug at register level using oscilloscopes and JTAG, mentor junior engineers, and drive toolchain and quality standards across teams.

Work on embedded hardware and FPGA-based wearable systems: assist with schematic capture, multilayer PCB layout, component selection, prototyping, board bring-up, validation, testing, and debugging. Support FPGA implementations for signal processing and interface logic while collaborating with product, industrial design, and supply chain teams.

Lead design, simulation, prototyping, and launch of wearable embedded hardware. Own schematics, multilayer PCB layout, system integration, component selection, validation, bring-up, and cross-functional coordination for smart devices.

Work on designing, simulating, and prototyping ultra-low-power wearable and biomedical hardware. Support schematic capture, multilayer PCB layout, component selection, system integration, bring-up, validation, and testing for devices like smartglasses, rings, and watches while collaborating across design, product, and supply chain teams.

Lead architecture and execution of next-generation wearable Wi-R SoCs. Build and manage an IC design team, own RTL-to-GDS tape-outs, drive analog/RF front-end and mixed-signal integration, define verification/IP reuse methodology, and coordinate silicon validation, packaging, and product co-optimization with cross-functional teams.