Top Tech Jobs & Startup Jobs

Designs, implements, and maintains virtualized infrastructure across Azure Local, Hyper-V, Windows Server, SQL Server, file-sharing, and SUSE Linux environments. Develops PowerShell and Bash automation, administers SCCM deployments and patching, implements monitoring solutions, troubleshoots infrastructure issues, and collaborates with IT teams on secure, scalable hybrid-cloud solutions.

Develop and optimize FPGA firmware, including device configuration and security features, using C and C++. Responsibilities include writing design specifications, unit and system tests, emulator or silicon validation, and collaborating with hardware and validation engineers to debug complex system issues.

Partners with executive and senior leaders to align HR strategies with business objectives. Supports talent management, succession planning, performance management, organizational design, restructuring, employee relations, change management, and organizational effectiveness initiatives. Uses HR analytics, metrics, and AI tools to provide data-driven insights and guide decisions. This individual contributor role is based in the San Jose office four days per week.

Develops and supports automated FPGA and ASIC design verification flows from RTL through GDSII. Responsibilities include building scripting frameworks, integrating and enhancing EDA tools, applying AI/ML to design automation, automating repetitive workflows, improving design infrastructure, and collaborating with design, verification, CAD/EDA teams, and vendors. The role requires extensive experience with front-end RTL, pre-silicon verification, EDA tools, Unix/Linux, Python, Tcl, and Shell.

Develop and maintain C++ and Python software models representing FPGA devices within Quartus Prime. Build high-performance APIs supporting synthesis, placement, routing, timing, and power analysis. Collaborate across hardware and software teams to integrate next-generation FPGA devices and create tools for FPGA device bring-up. The role requires strong software engineering, algorithms, data structures, communication, and experience with EDA or FPGA tools is preferred.

Lead end-to-end FPGA development kit execution across board architecture, RTL, firmware, validation, manufacturing, and supply chain. Coordinate global engineering teams, design partners, ODMs, contract manufacturers, and suppliers. Drive BOM planning, cost optimization, component availability, obsolescence management, technical risk resolution, manufacturing execution, and platform robustness improvements.

Manage and grow strategic OEM customer accounts, develop sales strategies, exceed revenue targets, provide tailored semiconductor solutions, and serve as the primary account contact. Collaborate with business solutions, product marketing, and engineering teams; monitor markets and competitors; and deliver forecasting, reporting, and analysis to senior leadership. The role focuses on complex technical sales cycles and long-term customer relationships in the Los Angeles area.

Leads static timing analysis methodology and design automation for ASIC, custom, semi-custom IP, and FPGA timing flows. Owns production-grade flow architecture, characterization, regression, validation, deployment, and support. Partners with design, physical design, reliability, technology, and EDA vendor teams; resolves live timing issues through tape-out; evaluates tools and drives methodology roadmaps. Provides technical direction, mentors engineers, and may apply AI/ML to timing and design automation.

Own and scale Workday integrations, reporting, data governance, and workforce analytics. Serve as the Workday subject matter expert, translating business needs into reliable system solutions while partnering with HR, Payroll, IT, Finance, and vendors. Ensure data integrity, operational effectiveness, and actionable workforce insights. Lead integration and reporting strategy, support Workday security and reporting capabilities, and potentially guide teams or technical project delivery.

Provides technical guidance and customer support for Altera FPGA transceiver and protocol IP solutions throughout architecture, implementation, hardware bring-up, validation, and production. Responsibilities include reviewing designs, debugging RTL and hardware issues, reproducing cases with FPGA and lab tools, coordinating defect resolution, developing scripts and reference designs, delivering training, and contributing to product readiness and documentation. The role requires expertise in high-speed serial interfaces, transceiver PHYs, FPGA design flows, protocols, and hardware troubleshooting.