Top Tech Jobs & Startup Jobs

Leads foundry relationships, process technology enablement, silicon manufacturing, yield improvement, reliability, and high-volume production for FPGA products. Oversees process qualification, PDK readiness, manufacturability, risk management, capacity planning, cost optimization, and supply assurance. Partners with design, product engineering, quality, supply chain, and executive teams while building and mentoring a foundry engineering organization.

Lead strategy, development, deployment, and scaling of custom-analog design automation and AI-assisted workflows. Automate schematic, layout, verification, and signoff processes; apply AI/ML to sizing, layout assistance, and verification triage; establish IP reuse and flow-hardening practices; measure productivity and adoption; partner across fabric, SerDes, and IO teams; and mentor engineers adopting new methodologies.

Lead physical design execution across blocks and full-chip integration from floorplanning through tapeout. Own schedules, quality, risk mitigation, cross-team coordination, critical-path recovery, and signoff alignment. Partner with methodology and CAD teams, resolve execution blockers, engage senior customer stakeholders, and mentor physical design engineers. The role requires hands-on expertise in advanced-node implementation, timing and power closure, signoff flows, scripting, and delivery across complex multi-site designs.

Manages financial planning and control for federal government programs, including multi-year budgets, forecasts, cost estimates, EAC reporting, contract compliance, and financial risk mitigation. Analyzes project costs, supports pricing models, reviews subcontractor invoices, tracks procurement spending, prepares audit documentation, and briefs stakeholders. Requires expertise in federal contracting regulations, financial modeling, Excel, and Oracle or SAP accounting systems.

Own and architect physical design implementation and signoff methodologies across Altera’s product portfolio. Lead place-and-route, EMIR, timing, and power signoff flows; establish quality gates and scalable standards; deploy advanced-node technologies; and introduce AI/ML-driven optimization, prediction, automation, and debugging. Serve as the technical authority for tapeout readiness, resolve complex closure issues, collaborate with EDA vendors and technology teams, and mentor physical design and CAD engineers.

Drive business development and FPGA design wins across robotics, autonomous systems, industrial automation, and edge AI. Build OEM, vendor, integrator, and ecosystem partnerships; position FPGA solutions against competing architectures; support technical sales, customer engagements, sales enablement, opportunity qualification, and deal progression. Provide market feedback to product and engineering teams while developing solution architectures, competitive positioning, ROI analyses, and customer-driven growth strategies.

Leads a GUI software engineering team developing high-performance interfaces for EDA tools. Responsibilities include managing and mentoring engineers, coordinating globally distributed teams, driving GUI architecture and product delivery, and collaborating with product management, applications engineering, hardware, software, and EDA backend teams.

Own and develop production Reliability Verification tools, flows, automation, regressions, and methodology for custom/analog and ASIC designs. Execute EM/IR analyses, triage violations, support tape-outs, enable new process nodes, and drive fixes to sign-off. Provide user support, documentation, training, and vendor engagement while modernizing RV workflows and applying AI/ML and scripting to improve performance.

Leads Altera’s AI transformation of hardware design by defining AI/ML strategy, deploying tools across design, verification, and implementation workflows, building data and evaluation foundations, and measuring productivity impact. The role requires deep semiconductor and EDA expertise, hands-on ML/LLM experience, cross-functional influence, vendor evaluation, stakeholder engagement, and mentoring without direct reports.

Drive product definition and roadmaps for PCIe, CXL, and DMA IP for FPGA devices. Gather and prioritize market and customer requirements, align cross-functional programs, generate product requirements, and coordinate engineering execution and change management to deliver hard and soft IP solutions.