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Lead the Design Verification team, define methodologies, validate ASICs, collaborate across teams, and oversee recruiting and team development.

Responsible for designing and delivering high-speed transceiver products, including specification definition, schematic design, and production initiation.

As a Principal Engineer at Marvell, you will lead and execute DFT on complex ASIC/SoC designs, mentor a team, and enhance DFT methodologies.

The Senior Principal Verification Engineer will verify SoCs, develop test benches, execute test plans, debug simulations, and mentor junior engineers.

The Principal Engineer in Customer Quality Engineering is responsible for managing customer quality requirements, driving improvement programs, and ensuring alignment with internal quality standards. This role involves leading customer engagement activities, assessing reliability risks, and fostering cross-functional collaboration to optimize quality metrics and strengthen relationships with customers.

The Senior Staff Engineer will design and verify analog mixed-signal layouts, collaborate with teams, and maintain documentation in deep sub-micron CMOS technologies.

The Test Engineer will design, debug, and develop ATE test programs for high-speed optical PHY and AI products, while undergoing training.

The role involves designing and verifying high performance analog circuits, leading projects, and managing teams in semiconductor solutions.

The AI/ML Engineer will architect, design, and develop simulators for SSD controller SOCs, leading the development and mentoring the team while conducting reviews and user training.

As a Package Engineering Intern, you will engage in semiconductor package development, substrate design, and improve manufacturing processes while gaining hands-on experience.