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As a Quality Engineer at Astera Labs, you will be responsible for quality management across various domains including customer quality, supplier quality, new product development, and regulatory compliance. Strong academic background in electrical engineering is required with skills in data analysis, relationship management, and quality engineering. Preferred experience in Python programming and familiarity with CAD layout tools.

Architect and develop firmware and microcontroller subsystems for Astera Labs' SoC and systems products. Collaborate with logic designers on HW-SW interfaces, work with high-speed interfaces in Data Center equipment, and engage in customer-facing activities to ensure customer needs are met.

Design and develop Firmware for enabling CXL/PCIe technologies for future products defined by Astera Labs CXL solutions. Solve problems, understand hardware specifications, and debug PCIe link issues during server boot. Preferred experience in pre-silicon validation, CXL, I2C, SPI knowledge, and server memory or I/O performance.

The Principal Diagnostic Platform Software Engineer will build diagnostics and manufacturing software for high-speed datacenter products. Responsibilities include designing and testing production-grade diagnostics, supporting hardware validation, performing root-cause analysis, and collaborating with the hardware engineering team on design and project management.

The Senior Field Applications Engineer will support cloud service providers and OEMs by designing solutions with Astera Labs' connectivity products, understanding customer requirements, and coordinating with engineering teams. Responsibilities include hands-on design support, customer interaction, and innovation implementation.

The Principal ASIC Engineering Program Manager leads engineering activities for ASIC product development, managing programs from concept to production, ensuring on-time delivery, and maintaining high quality. Responsibilities include planning, budgeting, risk assessment, and collaboration with cross-functional teams, while championing program visibility and alignment among stakeholders.

The Tech Lead Firmware Engineer will design and develop Firmware to enable DDR technologies for innovative products at Astera Labs, focusing on CXL memory solutions. Responsibilities include debugging DDR-related issues and potentially collaborating with cross-functional teams on DDR memory interfaces.