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Lead next-generation ASIC infrastructure initiatives, develop tools and infrastructure for DV, Emulation, pre-silicon, and post-silicon, with expertise in high-speed protocols and interaction with senior leadership.

Provide technical guidance to customers, generate collateral for existing and new products, and drive innovation by providing feedback to internal teams. Requires experience with PCIe/CXL and designing complex SoC/silicon products.

As a Quality Engineer at Astera Labs, you will be responsible for quality management across various domains including customer quality, supplier quality, new product development, and regulatory compliance. Strong academic background in electrical engineering is required with skills in data analysis, relationship management, and quality engineering. Preferred experience in Python programming and familiarity with CAD layout tools.

Provide technical guidance to customers, generate collateral for products, drive innovation, support semiconductor products design, and address challenges in leading-edge technology.

Architect and develop firmware and microcontroller subsystems for SoC and systems products. Responsible for implementing major features. Must work closely with hardware and customers. Strong academic background in electrical engineering required.

The HVM Principal Product Engineer at Astera Labs is responsible for supporting high-volume manufacturing products, ensuring smooth operations, and maintaining product quality. The role involves improving yield and test time, qualifying 2nd source OSAT, and developing manufacturing screening methods for high-speed signals.

Seeking experienced Principal Design Verification Engineers with expertise in emulation platforms and system-level ASIC development. Responsible for developing and executing emulation test benches and test plans, collaborating with validation teams, and deploying hybrid verification techniques.