Top Tech Jobs & Startup Jobs

Design and implement frontend RTL for high-performance physical IP, including USB, PCIe, and other serial interfaces. Responsibilities include low-power design, synthesis, constraints, DFT, verification strategy, FPGA/Palladium testing, and collaboration with analog, layout, backend, firmware, validation, and global delivery teams. The role also supports IP integration, QA, customer releases, and pre/post-silicon applications.

Develop and troubleshoot multithreaded, distributed physical synthesis software for Cadence’s Innovus platform. Collaborate with global R&D teams, product engineering, and technical sales to deliver customer solutions and workarounds. The role requires C/C++ development in Linux, strong data structures and algorithms knowledge, and customer communication skills. Experience with physical synthesis, timing analysis, multithreading, IC physical design tools, design closure, physical design flows, Tcl, and scripting is preferred.

Technical leader for Cadence’s Voltus power integrity and reliability platform. Owns advanced-node IR/EM signoff enablement, foundry and customer requirements, complex SoC/PDN issue resolution, modeling, product roadmap influence, and deployment. Partners across R&D, applications, field teams, marketing, customers, and foundries while mentoring engineering teams. Requires deep EMIR, PDN, digital physical implementation, CMOS, low-power design, scripting, and customer-facing technical leadership experience.

Designs, develops, and maintains processor-generator infrastructure, build and delivery systems, database integrations, REST APIs, web applications, automated testing, and release processes. Builds Java and React applications, configures application servers, manages SQL and NoSQL databases, automates fulfillment, supports production operations, and collaborates across engineering, marketing, applications, and order-processing teams.

Lead product engineering for DFT and ATPG features, defining product specifications, methodologies, validation flows, and documentation. Collaborate with R&D, product validation, field teams, and customers to benchmark designs, improve tool usability, influence new and existing tool development, and resolve complex hierarchical design issues. Support Innovus hierarchical partitioning and top-level timing closure workflows while driving successful customer deployments.

Develop C/C++ compiler and runtime software for HDL-based hardware verification platforms. Build SystemVerilog compiler front-end capabilities, improve compiler performance and infrastructure, and contribute to simulation, synthesis, and runtime flows. Collaborate with geographically distributed engineering teams to enhance Cadence verification products.

Provides technical leadership for advanced-node semiconductor implementation programs from synthesis and netlists through physical design, signoff, and tapeout. Develops PPA optimization methodologies, investigates silicon and convergence issues, collaborates with R&D and customers, influences EDA tool development, and establishes reusable implementation practices. Mentors engineers, supports strategic customer engagements and presales activities, and drives innovation across timing, power, signal integrity, verification, SoC integration, and advanced packaging.

Develop compiler technology for the Cadence Palladium emulation platform. Responsibilities include solving large-scale compilation problems involving logic optimization, logic modeling, data structures, multithreading, and distributed computing. The role requires strong software engineering fundamentals, C/C++ proficiency, debugging, Linux/Unix development, and knowledge of hardware description languages.

Leads North American cloud business development, technical pre-sales, customer engagements, and go-to-market execution for Cadence’s EDA cloud solutions. Develops cloud product roadmaps, business models, and sales pipelines while collaborating with sales, IT, R&D, and ecosystem partners. Evangelizes AI-driven EDA tools and applies generative AI to improve customer interactions and pre-sales support. Translates customer and industry needs into cloud product strategies and business growth.

Interns develop customer-focused technical documentation for Cadence’s Custom IC and PCB EDA products. Responsibilities include creating instructional content, reviewing product messaging and software interfaces, producing feature videos and blogs, and collaborating with R&D and product engineering teams across regions to ensure technical accuracy.