Top Tech Jobs & Startup Jobs

Reposted One Month AgoSaved
In-Office
3 Locations
122K-195K Annually
Senior level
122K-195K Annually
Senior level
Software • Semiconductor • Manufacturing
Design and implement virtual CPU and memory features for Broadcom's VCF products. Work on low-level OS/kernel internals, x86_64 CPU virtualization, and related assembly/C code to enable CPU ISA updates, memory virtualization, and monitor architecture improvements.
Top Skills: Amd-VAssemblyCInterrupt VirtualizationKernelMemory VirtualizationVirtual Machine MonitorVmware Cloud FoundationVsphereVt-XX86_64
One Month AgoSaved
In-Office
Seoul, KOR
Senior level
Senior level
Software • Semiconductor • Manufacturing
Design highly precise FBAR/BAW filters with advanced linear/non-linear performance and high power handling. Correlate simulations with measurements, collaborate cross-functionally, and improve product performance and reliability using EM, circuit, and layout tools.
Top Skills: AdsBawCadenceFbarHfssRfSaw
One Month AgoSaved
In-Office
Seoul, KOR
Mid level
Mid level
Software • Semiconductor • Manufacturing
Design high-precision FBAR (BAW) filters supporting advanced linear/non-linear performance and high power handling. Correlate device physics, simulations, and measured results. Use EM, circuit, and layout tools and collaborate cross-functionally to improve product performance and reliability.
Top Skills: AdsBawCadenceFbarHfssRfSaw
One Month AgoSaved
In-Office
Seoul, KOR
Senior level
Senior level
Software • Semiconductor • Manufacturing
Design and verify RF integrated circuits using SOI and RF CMOS processes. Perform RF device modeling, analog/RF circuit design, EM simulation, AMS verification, and Cadence-based layout including LVS/DRC/xRC.
Top Skills: Ams VerificationCadenceClarityDrcEmxHfssLvsRf CmosRf Device ModelingRf Ic DesignSoi ProcessXrc
One Month AgoSaved
Remote
Electronics City, Bangalore, Karnataka, IND
Senior level
Senior level
Software • Semiconductor • Manufacturing
Lead memory layout design from floor-planning to tapeout for advanced CMOS nodes. Apply process rules and verification (LVS/DRC/ERC), manage schedules, mentor juniors, automate layout flows, and document methodologies to meet quality and timing requirements.
Top Skills: 2Nm3Nm5NmAntenna ChecksCadence Schematic CaptureCadence VirtuosoCadence Virtuoso Xl (Vxl/Exl)CalibreCmos 7NmDrcElectromigrationErcFloor-PlanningHerculesLayout AutomationLvsMemory CompilersRc ExtractionSkill
New

Track Smarter, Apply Better.

Ditch the spreadsheets. Organize your job search with our freeApplication Tracker.

Use For Free
Application Tracker Preview
One Month AgoSaved
In-Office
Kalyan Nagar, Bangalore, Karnataka, IND
Senior level
Senior level
Software • Semiconductor • Manufacturing
Own the vision, strategy, and roadmap for AI-powered network observability products. Collaborate with engineering, design, data science, and GTM teams to integrate ML models for anomaly detection, root cause analysis, and predictive analytics. Drive product lifecycle from concept to launch, define KPIs, engage customers for feedback, and ensure successful SaaS/cloud-based deliveries.
Top Skills: AIAnalytics ToolsCloud-Based TechnologiesCloud-NativeData Visualization ToolsLarge-Scale Data ProcessingMachine LearningMicroservicesNetwork Monitoring ToolsNetwork Performance Monitoring And Diagnostics (Npmd)Network ProtocolsSaaS
Reposted One Month AgoSaved
In-Office
River Hills, Austin, TX, USA
129K-207K Annually
Senior level
129K-207K Annually
Senior level
Software • Semiconductor • Manufacturing
Perform DFT tasks including MBIST and scan insertion, ATPG and pattern simulation, ATE pattern development and silicon debugging, yield analysis, and cross-functional DFT collaboration during design and silicon bring-up.
Top Skills: Ate Pattern DevelopmentAtpgMbistMentor TessentPerlScan CompressionScan InsertionSta Constraint DevelopmentSynopsys Dft Tools
Reposted One Month AgoSaved
In-Office
Warrenville, IL, USA
91K-146K Annually
Senior level
91K-146K Annually
Senior level
Software • Semiconductor • Manufacturing
Design, build, test, and debug mainframe security and compliance software on z/OS using IBM Assembler (HLASM). Collaborate in Agile with product teams, automate tasks, modernize enterprise mainframe solutions, and support/debug production systems.
Top Skills: EndevorEsm (External Security Manager)Ibm Assembler (Hlasm)ImsIpcsJclMainframeMetal CScripting LanguagesXdcZ/OsZ/Vm
Reposted One Month AgoSaved
In-Office
3 Locations
141K-226K Annually
Senior level
141K-226K Annually
Senior level
Software • Semiconductor • Manufacturing
The role involves designing flip-chip-BGA packages for ASICs, collaborating on designs, managing projects, and improving processes.
Top Skills: Allegro Package DesignerCadence ApdCadence SkillDesign Automation
Reposted One Month AgoSaved
Remote
Electronics City, Bangalore, Karnataka, IND
Mid level
Mid level
Software • Semiconductor • Manufacturing
Perform block- and full-chip static (IR) and dynamic (IVD) sign-off; power estimation (vector and vectorless); signal and power EM sign-off; implement custom power grids; conduct system-level PDN analysis across board, package, interposer, and die; collaborate with SoC and packaging teams on bump assignment and package routing optimization; run vectorless, vector, and mixed-mode dynamic analyses and PG grid resistance checks.
Top Skills: Bump AssignmentCustom Power Grid ImplementationDie)InterposerIr Drop AnalysisIvd/Dynamic Sign-OffMixed-Mode Dynamic AnalysisPackagePackage Routing OptimizationPdn Analysis (BoardPg Grid Resistance ChecksPower Em Sign-OffPower Estimation (Vector And Vectorless)Signal Em Sign-OffVector-Based AnalysisVectorless Analysis
All Filters
JobType
New Jobs
Job Category
Experience
Industry
Company Name
Company Size

Sign up now Access later

Create Free Account