Top Tech Jobs & Startup Jobs

Owns marketing automation platforms and integrations, develops and deploys event, webinar, email, gated-content, and internal communications campaigns, and manages quality assurance and stakeholder approvals. Oversees agency and vendor relationships, contact list imports, lead routing, and monthly performance reporting across email, webinars, and content assets.

Design and architect high-speed 100G+ SerDes signal-processing systems, including equalizers, FEC, filters, modulation, and analog compensation. Develop MATLAB and C/C++ models, simulations, requirements, verification plans, firmware, and lab tests. Collaborate with analog, digital, RTL, firmware, and validation teams to implement and debug ASIC designs. Support communications standards development, customer meetings, technical documentation, and marketing collateral.

Lead strategic programs that proactively engage enterprise technical-support customers, improve product adoption and satisfaction, reduce avoidable support interactions, and deliver measurable business outcomes. Analyze support trends and operational data, develop scalable engagement and enablement initiatives, establish success metrics, coordinate cross-functional execution, and present insights to leadership. Build repeatable frameworks and continuously refine programs using customer feedback and performance analysis.

Develops chip-level timing architecture, constraints, analysis, and signoff for advanced ASIC and SoC designs. Responsibilities include MMMC STA, pre- and post-route analysis, timing ECOs, violation debugging, signal integrity and clock analysis, timing-flow automation, and power/performance optimization. Collaborates with physical design, synthesis, and clock teams while contributing technical leadership, mentoring, methodology improvements, and timing documentation.

Designs and delivers high-performance electronic products while owning end-to-end electrical hardware development, including BOMs, circuit and board design, validation, manufacturing support, customer trials, field issues, and product sustaining. Collaborates with hardware, ASIC, signal integrity, mechanical, thermal, diagnostic, packaging, manufacturing, and partner engineering teams.

Provide technical support for Mainframe Storage Management software: troubleshoot complex issues using logs/traces/debugging, reproduce problems in lab environments, coordinate with Development on defects, manage escalations and on-call rotations, document and share KCS knowledge, and advise customers on configuration and upgrades.

Develop and maintain low-level firmware for ARM-based storage controllers, focusing on RAID functionality and PCIe, NVMe, SAS, and SATA protocols. Responsibilities include feature design, implementation, debugging, log analysis, issue resolution, product validation, release support, and hardware integration. The engineer will troubleshoot firmware-hardware interactions using DSTREAM and logical analyzers and collaborate with hardware and validation teams throughout the development lifecycle.

Develops and debugs ATPG and MBIST DFT patterns, supports post-silicon bring-up, and improves wafer sort and final-test yield. Responsibilities include scan diagnostics, failure analysis, repair debug, yield excursion root-cause analysis, silicon characterization, and correlation of electrical failures with fab data. The engineer partners with product and test engineering teams, performs volume data analysis, creates automated dashboards and wafer maps, and uses scripting and AI tools to identify process shifts and improve product yield and cost.

Design and verify CMOS I/O and analog/mixed-signal circuits, including references, op-amps, comparators, and power-on-reset circuits. Run AC/DC, signal integrity, jitter, power, reliability, and EMIR analyses. Collaborate with layout teams, create Verilog, Liberty, and IBIS models, document designs, and support chip integration and silicon bring-up. The role requires advanced-node CMOS expertise, knowledge of I/O protocols, and proficiency with Cadence Virtuoso and SPICE/Spectre simulation.

Leads an electrical engineering team developing and testing IO and analog mixed-signal IP. Oversees project delivery, technical troubleshooting, quality assurance, verification efficiency, resource allocation, documentation, and collaboration with global cross-functional teams and customers. Provides expertise in ESD, latch-up, transmitter and receiver architectures, analog circuits, and digital implementation flows while mentoring engineers and supporting diverse Broadcom business applications.