Top Tech Jobs & Startup Jobs

Develop and execute verification plans and testbenches for mixed-signal components. Build analog behavioral and system simulation models, debug presilicon issues, collaborate with architects and RTL/physical design teams, and improve verification infrastructure using scripting and AI-based tools to ensure functionality, timing, and power goals are met.

Design, build, and maintain full-stack AI-driven self-help, self-heal, and autonomous operations platforms. Integrate LLMs and MCP, implement remediation workflows, develop APIs/microservices, create front-end dashboards, ensure security, scalability, observability, and collaborate on onboarding automation use cases and production support.

Verify USB IP designs by developing verification plans and testbenches, running system simulations for power, timing, and functionality, debugging presilicon issues, collaborating with architects and RTL/physical design teams, and improving verification infrastructure and coverage.

Provide technical troubleshooting and operational support for factory automation applications and systems, support worldwide factory applications, and contribute to software hardening and CIP development. Work a compressed 12-hour shift schedule onsite, communicate findings to factory users, and manage multiple applications.

Develop and optimize CUF (capillary underfill) module assembly processes and equipment to meet quality, reliability, cost, yield and manufacturability targets. Lead process development, DOE and data analysis, reliability testing, material specification with suppliers, and tooling/equipment improvements. Provide packaging consultation, standardize qualification methods, and collaborate with cross-functional teams to mitigate risk and enable roadmap technologies.

The engineer develops media and collaterals for assembly processes, optimizes manufacturing efficiency, and ensures quality and reliability in semiconductor packaging.

Perform end-to-end physical design for custom IP and SoC from RTL to GDS: floorplanning, clock and power distribution, place-and-route, STA, power/noise analysis, DFT, verification/signoff, and automation of physical design flows.

Drive improvements in factory manufacturing availability and end-to-end raw material supply chain for advanced packaging. Lead supplier quality and safety initiatives, perform root cause analysis, implement mitigation and alternate sourcing, define inspection and KPI methodologies, support long-range planning, and mentor junior SCEs to optimize cost, yield, and continuity across multiple wafer-packaging manufacturing floors.

The role involves architecting and leading the development of a neuromorphic AI execution stack, focusing on firmware, runtime, and performance infrastructure while collaborating with multiple teams for integration and optimization.

The engineer will design and optimize high-speed analog circuits, validate designs, develop test plans, and ensure optimal layout in collaboration with teams, driving improvements for Intel's advanced products.