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Develop and extend Intel's LLVM-based compilers (C, C++, SYCL, Fortran) to support new language standards, implement compiler features, optimization passes and code generation, collaborate upstream with the clang/LLVM community, debug complex compiler issues, and contribute to oneAPI toolchain efforts.

As a Middleware Development Engineer, you will optimize software communication libraries for HPC and AI, identify performance issues, and collaborate with teams to enhance capabilities in scientific computing.

Develop, test, optimize, and evaluate technical solutions aligned with business objectives. Collaborate with cross-functional teams to solve technical challenges, analyze data for continuous improvement, and maintain documentation and technical reports. This is a one-year, on-site temporary position in Guadalajara, Mexico.

Lead a global team to manage monthly financial close, consolidated financial statements, and SEC reporting (10-Q/10-K). Drive quarterly management reporting, balance sheet and cash flow analysis, process improvements, and partner with External Reporting, Treasury, Tax, IT, auditors, and Investor Relations to ensure accurate, timely global close and compliance.

Performs pre-silicon functional verification of GPU graphics, media, and display logic. Develops reusable verification plans, testbenches, simulation models, and coverage infrastructure; executes tests, analyzes power and timing, debugs failures, identifies root causes, and implements corrective measures. Collaborates with GPU architects, RTL developers, and physical design teams to verify complex features against functional, performance, and power goals.

Lead technical sales engagements for Intel products by developing advanced solutions, managing customer technical relationships, partnering with OEMs/ISVs, delivering presentations, gathering customer feedback, and advocating product requirements into roadmaps. Support complex sales cycles, optimize solution stacks, and travel to meet customers as needed.

Implements custom CPU physical designs from RTL through GDS, including synthesis, floorplanning, placement, routing, clock-tree synthesis, timing closure, power analysis, reliability checks, and signoff verification. Collaborates with architecture, logic, circuit, automation teams, and EDA vendors to optimize CPU power, performance, and area. Develops physical-design methodologies and automation flows while analyzing results to improve future microarchitectures.

Lead EMIB-T substrate technology development and qualification, driving supplier readiness, technical enablement, and milestone execution. Collaborate with engineering teams, suppliers, and assembly partners in high-volume manufacturing environments. Apply advanced packaging knowledge, process flow development, FMEA, DOE, characterization methods, and statistical process control to improve yield and deliver qualified solutions.

Designs and develops CPU logic and RTL for microprocessor components and IP blocks. Defines architecture and microarchitecture features, optimizes power, performance, area, and timing, and prepares designs for physical implementation. Reviews verification plans, resolves RTL test failures, documents microarchitectural specifications, and supports SoC integration. Collaborates cross-functionally while communicating complex technical information clearly in demanding, ambiguous environments.

Drives CPU performance verification methodology, circuit and timing quality signoff, process-node evaluation, frequency target recommendations, and performance, power, and area tradeoffs. Collaborates with RTL, circuit, and design teams to meet timing targets. Owns pre-to-post-silicon verification correlation and debugs circuit marginality. Requires advanced CPU circuit or backend design experience, circuit design and STA expertise, and strong execution and technical ownership.