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Design and develop CMOS image sensor analog and mixed-signal circuits in advanced sub-micron technologies. Perform schematic and layout design, simulation, verification, parasitic extraction, and whole-chip integration using industry-standard EDA tools. Collaborate with digital, verification, process, test, and applications teams to define interfaces, debug fabricated sensors, and optimize performance. Develop scripts for simulation and data analysis, conduct laboratory measurements, and contribute innovative circuit research and development.

Designs, optimizes, and physically implements column-level ADC circuits for CMOS image sensors. Responsibilities include column layout design, cross-product IP comparison, RCX parasitic extraction, supply and power-routing analysis, floorplan optimization, design-rule development, Calibre SVRF debugging, and SKILL scripting. The role collaborates with circuit designers and cross-functional teams to improve ADC performance, silicon efficiency, image quality, and layout robustness.

Develops and integrates CMOS image sensor fabrication processes with foundry partners, managing experimental silicon splits, process flows, schedules, and performance targets. Supports production and design teams by improving yield and sensor performance for mass production. Analyzes wafer and bench data, coordinates characterization testing, communicates technical requirements across internal and external teams, and monitors foundry lot processing to resolve issues and advance future technologies.

Develop AI/ML solutions for semiconductor design and verification workflows. Build scalable pipelines that extract and analyze EDA logs, reports, run artifacts, and design metadata. Create models, heuristics, and analytics for STA, DRC/LVS, ECO optimization, debug, and regression acceleration. Integrate solutions into CAD infrastructure, automation systems, schedulers, and design databases while collaborating with EDA vendors.

Designs and verifies image sensor controls, processing functions, and high-speed USB/MIPI interfaces. Performs full-chip integration, verification, chip bring-up, validation, and debugging. Participates in FPGA development and documents architectures, registers, interfaces, and designs. Requires familiarity with Verilog RTL, simulation, synthesis, static timing analysis, and formal verification, plus knowledge of high-performance, low-power design, FPGA platforms, emulation, and SoC architecture.

Own CMOS image sensor product engineering from definition through production ramp. Develop characterization and testing plans, resolve silicon, process, color, package, pixel, and yield issues, and optimize manufacturing processes and layouts. Collaborate with R&D, foundry, pixel design, characterization, manufacturing, and test engineering teams. Drive datasheet finalization, corrective actions, semiconductor tool vendor improvements, and wafer-level and final test program release for image sensors and ASIC devices.

Performs failure analysis of image sensor products and customer returns, creates technical reports, and drives corrective actions. Ensures quality across product development, manufacturing, testing, production release, and servicing. Leads quality improvement initiatives, reduces test incidents, improves customer processes, and supports design, test, and supplier quality activities.

Develop and debug CMOS image sensor test programs, algorithms, ATE hardware, probecards, and loadboards for engineering and mass production. Analyze test data, improve fault coverage and yield, support R&D characterization and DFT/DFM planning, troubleshoot production issues, assist subcontractor ramp-up, and prepare customer engineering samples.

Develop and enhance image and video processing algorithms for camera applications, improving functionality, quality, and performance. Support algorithm implementation, testing, and verification across teams; drive hardware productization; document algorithms; and collaborate with external researchers. The role requires image processing expertise, digital photography and image quality assessment knowledge, C/C++ proficiency, strong communication, teamwork, and the ability to learn. Experience with ISP or CMOS image sensor algorithm deployment and color or image processing techniques is advantageous.

Design and verify advanced CMOS image sensor analog circuits, including ASRAM and signal-chain building blocks. Perform schematic, layout collaboration, post-layout verification, PVT and Monte Carlo simulation, IR drop and power integrity analysis, and tapeout signoff. Develop Python and Perl automation for simulation and yield analysis. Collaborate across digital, verification, process, and test teams on interface specifications, calibration, silicon bring-up, lab characterization, and performance debugging.