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18 Days AgoSaved
In-Office
Santa Clara, CA, USA
105K-135K Annually
Entry level
105K-135K Annually
Entry level
Semiconductor • Manufacturing
Designs, simulates, verifies, debugs, and characterizes embedded analog and mixed-signal circuits, including high-speed I/O, SerDes, FIFO, CDR, and PLLs. Collaborates with system and test engineers on interfaces, package and board design, and system clocks for image sensor and bridge products. Performs high-speed testing with oscilloscopes and BERT, supports layout optimization, verifies analog-digital interfaces, and documents IP and design specifications.
Top Skills: BertCadencePllRtlSerdesSpectremdlSpice
18 Days AgoSaved
Remote
Oslo, NOR
Senior level
Senior level
Semiconductor • Manufacturing
Design and verify analog and mixed-signal circuits for advanced image sensors used in autonomous-vehicle machine vision. Responsibilities include transistor-level and layout implementation, simulations, physical verification, chip debugging and characterization, reliability improvements, and performance optimization. The engineer will contribute to design innovation, mentor junior engineers, support project leadership, and may manage a team.
Top Skills: AdcsAnalog Circuit DesignCadenceIc LayoutImage SensorsLow-Noise RegulatorsMentor GraphicsMixed-Signal Circuit DesignPhysical VerificationSynopsysTransistor-Level Design
18 Days AgoSaved
Remote
2 Locations
Senior level
Senior level
Semiconductor • Manufacturing
Executes circuit and system simulations for high-speed SerDes blocks, supports integration and verification, assists with silicon bring-up and lab characterization, correlates simulations with measurements, documents results, and contributes to technical reviews while working with analog, digital, and layout teams.
Top Skills: HspiceLinuxSerdesSpectreSpiceUnixVerilog-AVerilog-Ams
18 Days AgoSaved
In-Office
Santa Clara, CA, USA
111K-140K Annually
Entry level
111K-140K Annually
Entry level
Semiconductor • Manufacturing
Designs and verifies image sensor processing functions, USB/MIPI high-speed interfaces, and full-chip SoC integration. Responsibilities include chip bring-up, validation, debugging, FPGA development, and architecture, register, interface, and design documentation. Requires digital design expertise covering Verilog RTL, simulation, synthesis, static timing analysis, and formal equivalence. Knowledge of low-power design, FPGA/emulation platforms, SoC architecture, and image processing is beneficial.
Top Skills: DspFormal VerificationFormalityFpgaImage ProcessingMipiRtl SimulationSoc ArchitectureStatic Timing AnalysisSynthesisUsbVerilog Rtl
18 Days AgoSaved
In-Office
Santa Clara, CA, USA
157K-160K Annually
Senior level
157K-160K Annually
Senior level
Semiconductor • Manufacturing
Lead full-custom analog IC physical design for CMOS image sensors, including column ADC layout, floorplanning, power and clock planning, chip-level routing, parasitic analysis, physical verification, and GDS tape-out. Optimize image sensor performance, area, noise, matching, and power integrity. Develop layout methodologies, automation scripts, design rules, and SVRF files while coordinating top-level implementation resources and schedules.
Top Skills: Analog Ic LayoutAntAsicCadence VirtuosoCalibreCmosDesign CompilerDfmDrcEdaErcGdsIc CompilerInnovusLakerLvsP2PPerlPrimetimePvsRcxSkillSkipperSpectreSvrfSynopsys HspiceTcl
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18 Days AgoSaved
In-Office
Santa Clara, CA, USA
111K-140K Annually
Senior level
111K-140K Annually
Senior level
Semiconductor • Manufacturing
Owns product engineering from semiconductor tapeout through mass production. Responsibilities include product definition, DFM input, product introduction and ramp-up, yield analysis and corrective actions, characterization, datasheet finalization, and development and release of wafer probe and final test programs. Supports existing products, resolves technical issues with R&D and manufacturing teams, and drives yield improvements for image sensor and ASIC devices.
Top Skills: AsicDfmDramFinal TestingFlash MemoryImage SensorsSilicon ProcessSramWafer Probing
18 Days AgoSaved
In-Office
Mechelen, BEL
Senior level
Senior level
Semiconductor • Manufacturing
Designs, verifies, and documents digital control and signal-processing modules for CMOS image sensors. Responsibilities include high-speed interface design, RTL verification, chip integration, synthesis, DFT, timing and power analysis, gate-level simulation, FPGA development, silicon bring-up, validation, debugging, and technical documentation. The role collaborates closely with mixed-signal, physical integration, and validation teams.
Top Skills: Cmos Image SensorsDesign-For-Test (Dft)Formal VerificationFpgaLogic Equivalence Check (Lec)Logic SynthesisLvdsMbistMipiMixed-Signal DesignRtlScan TestingSocStatic Timing Analysis (Sta)Uvm
18 Days AgoSaved
Remote
Oslo, NOR
Junior
Junior
Semiconductor • Manufacturing
Design and verify digital IP for CMOS image sensors, including architecture, RTL, synthesis, STA, DFT, full-chip integration, and verification. Support power, performance, and area trade-offs; collaborate on floor planning and project tracking; and participate in silicon bring-up, validation, and debug. The role may develop into technical project leadership.
Top Skills: Asic Design FlowAsilAssertion-Based Formal VerificationCmos Image SensorsDesign-For-Test (Dft)Digital Signal Processing (Dsp)Fpga EmulationI2CImage Signal Processing (Isp)Logic SynthesisLow-Power DesignMipiRtlStatic Timing Analysis (Sta)
18 Days AgoSaved
In-Office
Santa Clara, CA, USA
157K-160K Annually
Junior
157K-160K Annually
Junior
Semiconductor • Manufacturing
Designs, simulates, characterizes, and debugs analog mixed-signal integrated circuits, including high-speed I/O, SerDes, PLLs, CDRs, clock trees, serializers, bias circuits, and ESD protection. Performs post-layout signal-integrity analysis, supports circuit layout and floor planning, verifies RTL synchronization blocks, evaluates performance across process, voltage, temperature, noise, and mismatch conditions, and collaborates with system and test engineers on image sensor and bridge-chip products. Documents design reviews, simulation findings, and project lessons learned.
Top Skills: Afs SimulatorC ShellCadence LayoutCadence SimvisionCadence SpectreCadence VirtuosoCadence VivaCdrEzwaveFifoHspiceMipi C-PhyMipi D-PhyPerlPllPythonPythonRtlScilabSerdesSpice
18 Days AgoSaved
In-Office
Irvine, CA, USA
111K-140K Annually
Entry level
111K-140K Annually
Entry level
Semiconductor • Manufacturing
Characterize and optimize CMOS image sensor performance by bringing up new silicon, validating functionality, developing testing methodologies, analyzing pixel-level and analog/digital subsystems, and identifying improvements. Collaborate with design, process, applications, production, and quality teams to resolve system issues, yield and reliability problems, and transition new products into production.
Top Skills: Cmos Analog DesignCmos Image SensorsDigital DesignElectrical Testing InstrumentationMatlabMixed-Signal DesignOscilloscopesPythonSemiconductor Device Physics
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