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Work with senior designers to design, validate, and characterize mixed-signal and analog IP (PLL, DLL, SERDES, high-speed I/O, data converters) for sub-14nm SoC technologies. Gain exposure to circuit design, validation, characterization, and lab testing; collaborate across teams and document results.

Intern will design, implement, and test imaging and video microcode for Ambarella SoCs, develop firmware/tools and test code, study DSP architecture, implement research ideas, and collaborate across teams to optimize performance and memory use.

Intern will develop and debug testbenches and RTL tests for SoC verification, create random test generators, coverage monitors, assertions, and tools/scripts for simulation and analysis. Work involves VLSI verification, performance measurement, and presenting results at internship end.

Design and verify video compression, image processing, vector processing, NN accelerators and processor cores in Verilog/SystemVerilog. Develop RTL, synthesize for timing/area/power, create SystemVerilog/UVM testbenches, write test plans, perform functional coverage analysis, and participate in chip bring-up and testing.

Implements and verifies design-for-test features, including scan, compression, MBIST, LBIST, and streaming scan networks, for complex computer vision SoCs. Develops scan and memory-test patterns, analyzes clocking for at-speed testing, performs post-layout timing verification, supports ATE pattern bring-up, and assists with silicon production, failure diagnosis, and test optimization.

Verify complex digital logic and SoC components by developing UVM/SystemVerilog testbenches, executing test plans for DSP, control logic, and processor cores, performing functional coverage analysis, debugging platforms with C/C++ and scripting, and collaborating with RTL, architecture, and software teams to ensure comprehensive validation.

Design, train, optimize, and validate deep learning and computer vision algorithms for edge devices. Implement and optimize models for runtime on Ambarella hardware and assess performance on large-scale datasets.

Temporary administrative support handling travel arrangements, calendar management, office and facilities support, space planning, event assistance, and general administrative tasks. Requires strong time management, communication, attention to detail, and proficiency with Microsoft Office/Outlook and AI productivity tools.

Develop, bring up, and verify embedded platforms and drivers in C/C++ on ARM/MIPS. Work with RT-Linux, lab equipment, and hardware teams to implement and test low-level control drivers and ensure system-level integration.

Design and verify video-compression, image-processing, vector-compute, and edge AI processor subsystems using SystemVerilog/Verilog. Synthesize and optimize RTL for timing, area, and power; prototype microarchitectures with scripting; develop unit tests, front-end flows, and coverage analysis; participate in chip bring-up and testing.