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Designs and develops analog and mixed-signal IC circuit blocks from specification and architecture through post-silicon verification. Responsibilities include circuit simulation, physical design coordination, integration into complex digital chips, bench-level test planning, characterization, debugging, and mentoring junior engineers. The role requires advanced analog circuit expertise, FinFET design experience, and proficiency with Cadence AMS tools and methodologies.

Design and develop analog and mixed-signal IC blocks from architecture through post-silicon verification. Responsibilities include circuit simulation, collaboration with mask designers, integration into complex digital chips, post-silicon test planning and debugging, and mentoring junior engineers. The role requires expertise in advanced FinFET technologies, AMS design flows, Cadence tools, and circuits such as SerDes, PLLs, ADCs/DACs, regulators, and clocking systems.

Provide high-level administrative support to the CFO, CHRO, and SVP of Global Operations and their teams, managing complex calendars, coordinating meetings and travel, processing expenses and procurement paperwork, maintaining confidential files, and supporting cross-functional projects, events, and leadership communications.

Lead and support SEC financial reporting, US GAAP technical accounting, monthly/quarterly/annual close, SOX compliance, and operational accounting. Manage audits, mentor accounting staff, drive process and ERP improvements, and partner cross-functionally on acquisitions, stock-based compensation, and other complex transactions for a Nasdaq-listed semiconductor company.

Develop and execute Pre-Si and Post-Si test plans for chip IP using FPGA-based test circuits and Lattice design tools. Automate test generation, run ATE and bench validations across process/temperature/voltage, perform root-cause analysis, drive IP content to closure, deliver test content on schedule, and extract coverage metrics using fault grading.

Lead foundry-facing technical activities to enable process adoption and on-time tape-out. Manage PDK readiness, align design/signoff flows with foundry requirements, define device test structures, support silicon characterization, and scale technology collateral and methodology across teams.

Lead design and optimization of FPGA synthesis engines and toolchains. Drive QoR improvements (Fmax, area, compile time), define architecture and algorithms, modernize codebase, troubleshoot complex synthesis issues, and mentor engineers while aligning features to product roadmap.

Lead commercial contracting for AMI's firmware and platform software business: draft and negotiate software/firmware licenses, OEM/ODM, OSS governance, JDAs, source code escrow, SaaS/cloud and services agreements; build contract playbooks, CLM processes and repositories; advise cross-functional teams; and coach and manage junior legal staff to support global OEM and enterprise deals.

Lead go-to-market strategy for humanoid robots, cobots, and adjacent AMRs. Define segment strategy, solution narratives, MRDs, and differentiations around low-power programmable logic and Tiny AI. Drive design-win engagement with top platform architects, build targeted ecosystem partnerships, coordinate with sales and engineering, and represent the company at industry forums to accelerate adoption of Physical AI at the edge.

Manage assigned accounts and territories to drive revenue, design wins, and customer satisfaction. Build account plans, maintain CRM pipeline, forecast sales, influence stakeholders, coordinate cross-functional teams, negotiate contracts, and present technical value propositions focused on FPGA/semiconductor solutions.