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Lead a global team to define and deliver SoC-level clock, reset, power, and thermal architectures. Drive requirements gathering, prototyping, implementation, verification, and post-silicon bring-up while coordinating OEMs and software partners to ensure power-efficient, high-quality SoC products.

Lead a global SoC Power and Clocking team to define, prototype, and deliver SoC-level clock, reset, power and thermal management architectures. Resolve complex issues across architecture, implementation, and post-silicon bring-up, coordinate with OEMs and software teams, and prioritize platform-level challenges to deliver power-efficient SoC products.

The role requires designing, building, and operating a secure OpenStack private cloud environment, focusing on Infrastructure as Code and automation to support scalable engineering workloads.

Analyze data-path RTL and algorithms, build abstract C models, prove RTL–C equivalence with SLEC, and formally verify models against architectural specs using ACL2. Improve verification infrastructure, interfaces, and apply interactive theorem proving across Arm projects while collaborating with designers and verification engineers.

Design and define SoC security architectures including Root of Trust, Secure Boot, Key Management, Confidential Compute, attestation, secure manufacturing, and device lifecycle. Perform threat modeling, cryptographic analysis, hardware/software threat assessment, and collaborate across teams to develop security policies, access control, and mitigation strategies for hardware and firmware threats.

This role focuses on enhancing developer experience through improved tools and solutions, collaborating with developers and engineering teams, and managing product roadmaps for performance tooling.

Design and integrate SoC subsystems (PCIe, DDR/LPDDR, HBM, UCIe, Ethernet); author micro-architecture specs; develop RTL in Verilog; perform static checks (CDC, RDC, X-Propagation, linting); collaborate with verification, performance analysis, and backend teams for floorplanning and timing closure; improve design methodologies and mentor team members while supporting project management.

Lead and expand Arm's North American university research partnerships by identifying academic contributions to technology roadmaps, coordinating multi-party collaborations, engaging US government funding opportunities, ensuring agreements and tracking, and acting as Arm's primary academic contact while aligning with internal stakeholders like Government Affairs and Workforce Development.

Perform adversarial security analysis of SoC microarchitectures across pre- and post-silicon platforms. Review architecture, RTL, firmware, and integration to identify vulnerabilities, develop PoCs/exploits, apply automation and AI-assisted techniques, collaborate with engineering teams, and improve threat models, mitigations, and offensive security tooling and methodologies.

Lead product strategy and lifecycle for Physical IP and CPU products targeting Edge AI. Define roadmaps, translate market and customer insights into engineering requirements, drive competitive positioning, and engage Tier 1 customers to secure design wins. Collaborate cross-functionally with engineering, sales, marketing, and executives to influence CPU roadmap, deliver commercial cases, and ensure customer success.