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The candidate will develop event-driven and analog circuit simulation algorithms for mixed signal circuit simulation technologies at Cadence.

The Software Intern at Cadence will work on research and development using machine learning technologies for on-chip parasitic modeling in a team environment.

The Principal Product Engineer focuses on delivering emulation and virtual protocols for SOC verification, collaborating with R&D and customers to implement product features and ensure readiness for deployment.

The candidate will design and develop a multi-threaded physical synthesis core engine, collaborating with a global R&D team to provide engineering solutions.

The Lead Solutions Engineer will develop and validate DRC and LVS runsets for Pegasus tools, lead automation frameworks, and provide technical support to customers while mentoring junior engineers and collaborating with R&D.

The Director & Sr. Counsel will lead compliance matters, drive global compliance program design, advise on laws, manage risk assessments, and support internal investigations.

Design and develop Multi-Physics System Analysis software, debug errors, implement features, and write tests.

Support silicon bring-up and debug of Memory IP subsystems, ensure integration of Memory PHY and Controller IP into customer systems, and collaborate with cross-functional teams to solve technical issues.

The role involves developing, troubleshooting, and supporting the Genus Synthesis Solution with a focus on logic synthesis and physical design.

Lead the development of advanced packaging and 3DIC analysis flows. Requires extensive experience in signal integrity and power integrity related to IC and PCB design, as well as customer interaction. Must have strong knowledge of Cadence tools and advanced packaging concepts.