Join the team behind Xcelium, the industry-leading logic simulator, to architect the next generation of hardware verification technology. As a Senior Engineer in the System Verification Group, you will be at the forefront of EDA innovation, evolving the Xcelium simulator to meet the staggering complexity of future AI and hyperscale chip designs. You will be part of an innovative, geographically distributed team dedicated to advancing the capabilities of RTL/logic simulation for semiconductor technology. The work environment encourages collaboration, technical excellence, and continuous learning.
We are looking for an experienced C/C++ software engineer to join the Xcelium Software Development Team to develop and enhance RTL/logic simulation products.
Responsibilities:
- Enhance and support Xcelium RTL/logic simulator engine to add new features and extend existing features.
- Enhance and support Timing Constraints Verification technology used inside Xcelium simulator.
- The role involves designing, tuning, and innovating graph algorithms involving SDC constraints support on multi‑billion‑node graphs.
- Conduct deep-dive bottleneck analysis and implement performance optimizations in C/C++ to improve compilation speed and memory footprint.
- Collaborate with global team members to deliver high-quality results in a distributed environment.
- Write Specifications and Unit Tests for your code.
Position Requirements/Qualifications:
- MS/PhD in Computer Science or Electrical Engineering.
MS in Computer Science or Electrical Engineering with a minimum of 7 years of experience OR PhD with a minimum of 5 years of experience
- 5+ years of experience in EDA software development.
- Strong background in RTL/Logic Simulation, SDC constraints and Timing Analysis especially path exceptions handling in a STA tool.
- Excellent programming skills in C/C++ and a deep understanding of SystemVerilog or Verilog.
- Experience in multi-threaded/ concurrent programming.
- Ability to quickly learn new technologies and adapt to project requirements.
- Prior experience with RTL/logic simulation software development is an added plus.
The annual salary range for California is $161,000 to $299,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.Skills Required
- MS or PhD in Computer Science or Electrical Engineering
- MS degree holders must have at least 7 years of experience
- PhD holders must have at least 5 years of experience
- At least 5 years of experience in EDA software development
- Strong background in RTL or logic simulation, SDC constraints, and timing analysis, especially path exceptions handling in an STA tool
- Excellent programming skills in C/C++
- Deep understanding of SystemVerilog or Verilog
- Experience with multithreaded or concurrent programming
- Ability to quickly learn new technologies and adapt to project requirements
- Prior experience with RTL or logic simulation software development
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
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Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
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Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
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Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
Cadence Design Systems Insights
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
