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As a Senior DFT Engineer, you'll develop DFT architecture for AI Chips, collaborating on DFT methodologies and ensuring product quality.

Lead emulation-based SoC verification: bring up SoCs on emulators, root-cause test and environment failures, collaborate with cross-functional teams, debug with emulation vendors, and maintain accelerated UVM testbenches using SystemVerilog, Verilog/VHDL and C/C++ DPI transactors.

Verify GPU micro-architecture using formal verification tools: define scope, write and implement formal testplans (assumptions, assertions, covers), develop abstractions to obtain proofs, drive tool performance, debug RTL, create scripts/flows, and communicate coverage to partners.

Design, develop, and verify features for next-gen RISC-V controllers on NVIDIA GPUs, collaborate with hardware and software teams, perform early modeling/simulation, follow devices through development to customer products, and support BSP and device driver development.

Lead cross-disciplinary software architecture for next-generation CPUs and SoCs, collaborating with hardware, software, ASIC, verification, and platform teams. Influence hardware decisions via deep system software, OS/driver, and performance expertise, advise partners and senior management, and drive optimized solutions for AI and HPC workloads.

Verify GPU micro-architecture using formal verification tools. Define verification scope, write and implement testplans, create assumptions/assertions/cover properties, develop abstraction models, drive formal tool performance, debug RTL, build flows and scripts, and communicate coverage and results to architects, designers, and verification teams.

Design, deploy, and operate Kubernetes-based large-scale storage and data platforms. Build automation, tooling, telemetry, and observability. Troubleshoot distributed systems, support CI/CD and IaC, participate in on-call rotations, capacity planning, and launch readiness.

Lead commercial efforts for NVIDIA AI-Factory deployments across NALA by engaging clients, partners, and solution architects; develop proposals, prioritize opportunities, translate technical solutions into business value, and coordinate cross-functional teams to ensure successful delivery and service growth.

Develop and deliver system-level IP and RTL to measure performance on GPUs/SOCs. Create and automate flows, run/debug RTL checks (CDC, clocks, resets, latency), implement RTL features, and collaborate with architects, designers, and software engineers to support projects and performance monitoring.

Manage and deliver OpenBMC based manageability stack for Data Center Systems, leading a team of engineers and ensuring high quality firmware development.