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The Senior Design Engineer will design high-speed coherent interconnects, collaborating with teams to deliver advanced interconnect technology for GPUs and SoCs, driving innovation in AI computing.

The role involves developing and integrating energy modeling tools for NVIDIA's chips, analyzing algorithms, and improving power efficiency through data analysis and machine learning.

The role involves performing physical layout for mixed-signal functions in CMOS technologies, collaborating with engineers, and ensuring design rules compliance.

Lead design and optimization of next-generation high-speed IOs (NVLink, NVLink-C2C), focusing on IO power management, power/performance modeling, interoperability, and deep debug across cross-functional teams to enable product bringup and release.

Lead Product Co-Design and Verification at NVIDIA, focusing on Speed, Reliability, and Power Compliance. Oversee system design and verification, mentor engineers, and collaborate with various teams to achieve high-quality product outcomes.

The DFP Engineer designs manufacturing test methodologies, translating product requirements into tests, ensuring quality, yield, and throughput for silicon products.

Design evaluation boards for NVIDIA products, manage design execution, collaborate with architects, perform hands-on development and testing in a lab environment.

Develop and implement high-speed electrical/optical interfaces, conduct circuit design, and verify CMOS designs for NVIDIA's mixed-signal team.

Lead the performance modeling team, develop architectural specifications, guide engineers on silicon architecture, and resolve performance bottlenecks across projects.

Drive growth strategies for NVIDIA's AI platform across global governments, aligning with national security regulations and promoting AI lifecycle capabilities. Collaborate with teams to support the adoption of NVIDIA technologies while managing government partnerships.