Top Tech Jobs & Startup Jobs

Lead and coordinate SAP BPC processes for headcount, OPEX, and CAPEX planning, govern cost center master data in SAP MDG, manage month-end close and data validations, support users and FP&A stakeholders, liaise with IT, drive continuous improvements, maintain SOPs and audit documentation, and lead/support UAT and system testing.

Design and implement Rust-to-GPU compiler backends, IR frameworks, and JIT/AOT toolchains. Lower Rust AST/MIR to MLIR/LLVM/PTX, build GPU-specific optimizers, enforce safe parallel abstractions across host/device boundaries, and expose ergonomic device-side primitives. Drive projects from research to production and support profiling, debugging, and benchmarking workflows.

Lead forecasting, strategy, and technical enablement to grow NVIDIA Compute platform sales in enterprise markets. Drive partner and ISV relationships, publish market insights, influence product roadmaps, and enable global sales teams to accelerate AI adoption across cloud and on‑prem environments.

Lead strategic GTM and co-selling initiatives with Google Cloud to drive NVIDIA AI adoption. Develop and maintain technical enablement assets, run developer activations and events, collaborate with Google Cloud field and engineering teams, convert samples into demos and labs, and translate customer feedback into product and roadmap insights.

Design and implement production-grade VLSI/EDA tools and methodologies for multi-die package design. Build flows, applications, and automation to construct, analyze, validate, and optimize package designs to accelerate tape-out and scale engineering teams.

Analyze and optimize HPC application performance across CPU and multi-node multi-GPU systems by driving compiler and library improvements. Port and tune applications, evaluate compiler/runtime/driver impacts, and collaborate with compiler development and application engineering teams to deliver performance enhancements.

Build and maintain automation flows and methodologies for VLSI interposer design. Develop tools and applications (Python/C++) to construct, analyze, and validate interposer designs, improve designer workflows, and integrate AI/ML-assisted techniques into EDA environments.

Join an agile EDA software team to develop and automate PCB electrical design and layout tools (Cadence System Capture, Allegro) for system designers. Assess requirements, build tooling solutions, integrate databases and automation, and document processes to improve SI and design workflows.

Analyze and reduce RTL and pre‑silicon power for GPUs and networking chips using EDA tools and AI/ML. Run workloads, perform comparative power analysis, prototype Verilog features, debug power anomalies, and collaborate with architects, RTL designers, and physical design teams to drive power improvements.

Lead GPU ASIC development from concept through mass production. Coordinate architecture, RTL, verification, physical implementation, packaging, test and silicon bring-up. Track milestones, mitigate technical risks, and align cross-functional teams across IP, software, emulation, VLSI, and test to deliver high-performance GPU processors for AI datacenter products.