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The role involves architecting and operating NVIDIA's cloud-native attestation platform, developing high-availability services, collaborating with cross-functional teams, and mentoring engineers.

Develop Linux kernel and user-space power and thermal management software for NVIDIA Tegra SoCs and embedded platforms. Collaborate with hardware and software teams to estimate and optimize platform power, while improving performance, efficiency, responsiveness, compute and memory utilization, latency, and power consumption for edge AI and robotics workloads.

Design and architect high-speed, low-power memory solutions for NVIDIA Tegra SoCs. Analyze DDR, LPDDR, and HBM technologies; define memory, package, and PCB layouts; collaborate with architects, firmware teams, suppliers, and industry partners; and lead memory bring-up, validation, debugging, and failure analysis. Develop memory workloads and analysis tools using Python and C/C++.

Develop application software architecture for autonomous-vehicle perception and sensor-fusion systems. Integrate and tune NVIDIA solutions in target vehicles, lead bring-up activities, troubleshoot system issues, analyze in-vehicle and simulation data, and optimize hardware-software performance. Collaborate with architecture, development, partner, and global engineering teams to deploy scalable autonomous-driving solutions.

Engage leading academic AI labs researching foundation models, LLMs, multimodal systems, reasoning, training, inference, and scalable AI infrastructure. Advise researchers on NVIDIA platforms, identify impactful workloads, track frontier research, translate academic feedback into product and platform opportunities, and support technical workshops, university programs, and research conferences. The role requires deep foundational AI expertise, hands-on experience with AI training or inference, and strong research engagement credibility.

Design and optimize future GPU and processor memory systems for power, performance, area, and cost efficiency. Develop architecture and microarchitecture features, prototype models, and simulation workflows. Analyze benchmarks and performance or power results, debug issues across models, RTL, silicon, and systems, and collaborate with external partners. The role requires deep CPU/GPU architecture and memory systems expertise, power analysis experience, and proficiency in C, C++, and scripting languages.

Manage RMA case backlog and replacement part fulfillment per SLAs; prioritize supply allocation, track buffer stock and customer datacenter capacity, publish metrics and status updates, collaborate with manufacturing/quality/planning, and train/support other case managers.

Design and build a scalable failure-attribution framework for heterogeneous CPU/GPU clusters: collect high-fidelity telemetry, implement low-overhead tracing, automate root-cause classification (hardware, software, environment), and enable proactive resiliency measures like migration or checkpointing.

Supports open-model enablement and launches across NVIDIA’s accelerated computing platform. Coordinates with model builders, engineering, infrastructure, developer-experience, and marketing teams; tracks model releases; maintains requirements and launch plans; tests Python-based demos and workflows; gathers developer feedback; and contributes to technical content, announcements, and presentations.

Provide first-line support and troubleshooting for an HPC environment, monitor system health, triage incidents, perform maintenance and patching, and produce runbooks and documentation. Improve processes and escalate to SMEs for complex issues while supporting scheduling, compute, storage, and access concerns.