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As a HBM/DDR/SERDES DFT Verification Lead Engineer, you will implement and verify DFT methodologies, collaborate with design teams to identify testability requirements, utilize advanced simulation tools, and validate test vectors. You will also ensure high-quality standards through continuous design improvements and troubleshooting.

The Design Verification Engineer will execute formal and functional verification of complex designs, focusing on external interfacing IPs, and will handle all aspects of verification including test planning, test bench development, and functional/code coverage closure.

The Design Implementation Engineer will manage design implementation activities, focusing on place and route and timing closure. Responsibilities include floor-planning, timing analysis, and power optimization, utilizing tools like Primetime and Innovus. The role demands collaboration in a global team and the ability to drive tools for PPA metrics. Experience with ASIC tapeout in advanced technologies is essential.