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Reposted YesterdaySaved
In-Office
3 Locations
215K-303K Annually
Senior level
215K-303K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Responsible for defining and validating SoC IP blocks, collaborating with teams to ensure quality silicon for AI applications, and mentoring junior engineers.
Top Skills: AhbAltera Quartus IiAxiEda ToolsFpga PrototypingHdl SimulatorsIesLint ToolsPythonQuestaSpyglassSystemverilogTclVcsVerilogXilinx Vivado
Reposted YesterdaySaved
In-Office
Phoenix, AZ, USA
101K-194K Annually
Mid level
101K-194K Annually
Mid level
Artificial Intelligence • Cloud • Information Technology • Software
The Software Applications Development Engineer will create full stack integrated software solutions, manage project lifecycles, and enhance business efficiency for Intel's NPI Tools team.
Top Skills: .Net FrameworkAngularC#JavaScriptPl/SqlTsqlWcfWpf
Reposted YesterdaySaved
In-Office
Santa Clara, CA, USA
220K-364K Annually
Senior level
220K-364K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Lead the Enterprise Data & AI Enablement organization, driving strategic data and AI initiatives, collaborating with executives, and overseeing data governance, architecture, and enablement for advanced analytics.
Top Skills: AICloud PlatformsData ArchitectureData GovernanceEccErp SystemsMlS/4HanaSalesforceWorkday
Reposted YesterdaySaved
In-Office
Austin, TX, USA
142K-232K Annually
Junior
142K-232K Annually
Junior
Artificial Intelligence • Cloud • Information Technology • Software
The CPU Performance Architect at Intel will design CPU logic, optimize performance and power, and collaborate with engineering teams on innovative microarchitectures for advanced computing products.
Top Skills: C++Cpu ArchitectureMicro-Architecture SimulatorsObject Oriented Programming
Reposted YesterdaySaved
In-Office
5 Locations
164K-269K Annually
Senior level
164K-269K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Develop methodologies, models, and flows for advanced process design rules and validate them via silicon. Support IP and SoC teams with APR, signoff, and PPA optimization. Diagnose prototype issues, run experiments to ensure yield and reliability, and communicate process requirements to design teams.
Top Skills: CadenceEdaGdsPlace And Route (Apr)PpaRtlSignoffSynopsys
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Reposted YesterdaySaved
In-Office
Santa Clara, CA, USA
142K-269K Annually
Senior level
142K-269K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Lead design, simulation, and execution of large-scale silicon photonic integrated circuits from architecture through tape-out, validation, performance debug, reliability qualification, and cross-functional coordination with foundries and QA teams.
Top Skills: CadenceDeviceDrcGdsfactoryHaroldInterconnect)JmpKlayoutLumerical (FdtdLvsMatlabModeMonte Carlo ModelingOptical Backscatter ReflectometerOptical Spectrum AnalyzerOptical Vector AnalyzerPhoton DesignPythonRsoftSdlSilicon Photonic Integrated Circuits (Pics)Synopsys OptocompilerTidy3DTunable Laser
Reposted YesterdaySaved
In-Office
3 Locations
164K-312K Annually
Senior level
164K-312K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Lead development and advancement of CPU RTL front-end methodologies, leveraging AI tools to improve RTL coding, logic optimization, and cross-team collaboration. Drive strategies, tools, and techniques to meet power, performance, area, timing, and physical design targets while providing technical leadership across front-end and back-end flows.
Top Skills: Ai ToolsBack-End FlowsFront-End FlowsLogic OptimizationPhysical DesignRtlRtl MethodologiesSilicon DevelopmentX86 Memory ManagementX86 Microarchitecture
Reposted 2 Days AgoSaved
In-Office
2 Locations
164K-312K Annually
Senior level
164K-312K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Seeking an experienced AI SoC Design Engineer to define microarchitecture, implement RTL, and collaborate across teams to drive high-quality designs for AI hardware.
Top Skills: Systemverilog
2 Days AgoSaved
In-Office
Phoenix, AZ, USA
115K-220K Annually
Senior level
115K-220K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Lead development and control of reticle/mask processes for high-volume semiconductor manufacturing. Monitor reticle quality, analyze data, drive continuous improvement in tool and mask health, perform root-cause model-based problem solving, qualify tools for new technology startups, and mentor junior engineers while partnering cross-functionally to improve yield and productivity.
Top Skills: DoeEuvImmersion LithographyJmpMathematicaMatlabPhotolithographyReticle Inspection EquipmentSpc
Reposted 2 Days AgoSaved
In-Office
2 Locations
164K-312K Annually
Senior level
164K-312K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
The Senior AI SoC Design Engineer will define microarchitecture, implement RTL designs, ensure design quality, and collaborate across teams to develop advanced AI hardware solutions.
Top Skills: Systemverilog
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