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The Design Verification Engineer will develop and execute verification plans, creating UVM/SystemVerilog testbenches, and ensure clean handoff from simulation to silicon.

Lead global tool installation programs across semiconductor fabs, standardize TI methods and specifications, drive continuous improvement, mentor project managers, coordinate cross-functional teams, monitor KPIs and schedules, and present strategic recommendations to senior leadership.

Provide revenue insights and recommendations via forecasting, demand-supply analysis, scenario modeling, and KPIs. Lead business unit revenue forums, identify risks and opportunities, and improve forecasting processes using AI tools to influence supply prioritization, customer strategy, and investments.

Lead a team in developing next-generation vertically stacked DRAM while optimizing process flows and collaborating on technical issues. Conduct experiments and analyze data to enhance performance and manufacturability.

Develop and integrate thin film deposition processes for advanced DRAM, focusing on EUV patterning films. Perform process characterization, defect reduction, DOE-driven experiments, roadmap activities, supplier and tool collaboration, and physical/electrical data analysis to guide process decisions and transfer to high-volume manufacturing.

The Sr. Dry Etch Equipment Engineer leads reliability and performance improvements for Dry Etch tools, troubleshooting issues, and driving initiatives for yield and cost reduction in semiconductor manufacturing.

Responsible for maintaining semiconductor equipment, performing preventative maintenance, troubleshooting issues, and collaborating with production and engineering teams to optimize equipment performance.

Design and develop innovative HBM memory subsystem architectures for AI/ML solutions, collaborating with multi-functional teams and evaluating IP vendors.

Develop and optimize next-generation wafer and die equipment, drive cost reduction, collaborate with process teams, and conduct failure analysis.

Develop comprehensive DRAM system architectures, lead optimization across hardware layers, and interact with customers to translate requirements into silicon designs.