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The SoC/RTL Low-Power Expert will manage power architecture, enforce low-power design practices, drive RTL estimation, and supervise other engineers while ensuring power behavior accuracy throughout the silicon lifecycle.

Design and verify mixed signal circuits including ADCs, DACs, and PLLs, utilizing tools like Spectre and MATLAB to meet performance targets.

The role involves verifying chip circuitry, developing test plans using UVM/System Verilog, debugging simulation failures, collaborating with engineers, and mentoring juniors.