Top Tech Jobs & Startup Jobs

Lead and scale Etched’s legal function, including team development, legal operations, contract processes, automation, complex commercial negotiations, corporate governance, financings, and IPO preparation. Advise executives and the board on strategic transactions, equity, compliance, intellectual property, employment, and disputes. Manage legal budgets and outside counsel while partnering with engineering, manufacturing, finance, and commercial teams across U.S. and international operations.

Manage end-to-end semiconductor production planning, scheduling, capacity forecasting, procurement, supplier coordination, and logistics across wafers, packaging, assembly, and test. Partner with foundries, OSATs, engineering, validation, and internal operations teams to support engineering builds and mass-production ramp. Build forecasts, dashboards, and executive reports while mitigating supply, test infrastructure, and manufacturing bottlenecks.

Lead Etched’s physical-world brand experiences, including conferences, recruiting events, product launches, investor events, internal gatherings, and speaker programs. Own events end to end across creative direction, production, logistics, vendors, budgets, and measurement. Partner with founders, creatives, recruiters, engineers, agencies, and external partners to deliver polished, memorable experiences aligned with recruiting, brand, and business goals.

Support People Operations and Legal through compliance audits, employee records review, filings, contracts, onboarding and offboarding, recruiting handoffs, process documentation, and cross-functional company projects. The intern will investigate discrepancies, organize sensitive information, research requirements, coordinate across teams, and drive time-sensitive operational work to completion in a fully in-person San Jose office.

Designs complex IC substrate packages for high-power AI processors and accelerators, including large multilayer layouts, dense routing, power delivery networks, and signaling beyond 50GHz. The role optimizes CoWoS interposer designs, performs DRC and LVS verification, collaborates with silicon, SI/PI, packaging, and manufacturing teams, and supports design reviews and technical guidance for junior engineers.

Own block- and subsystem-level physical design from RTL synthesis through GDSII sign-off. Perform floorplanning, placement, CTS, routing, timing closure, sign-off (EM/IR/RC/DRC/LVS), generate abstracts for hierarchical integration, improve PPA with RTL collaboration, and supervise third-party delivery.

Design and validate power delivery networks for high-current ASIC systems: perform PDN pre/post-layout analysis, DC IR-drop and AC impedance simulations, VRM modeling, thermal co-simulation, DRC/PI checks, bring-up debug, and maintain simulation-to-hardware correlation.

The Physical Design Engineer will focus on block-level implementation, timing closure, PPA optimization, and supervising outsourced design work while improving design flows.

The Technical Program Manager will oversee program delivery, align teams, manage vendor relationships, and optimize processes in the Infrastructure organization.

Lead technical accounting and external financial reporting: implement ASC 606/IFRS 15 revenue policies, own NetSuite ARM implementation, draft technical memos, advise on inventory, warranty, equity reporting, prepare external statements and disclosures, strengthen controls, and build/manage a revenue/technical accounting team.