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As an ASIC Timing Engineer at Etched, you'll drive timing analysis and closure for next-gen AI chips, collaborate with various teams to develop timing strategies, enhance timing flows, and contribute to DFT timing closure across modes.

As a Software Engineer focusing on Infrastructure Performance, you'll design and write software for ASICs, ensuring CI tests run efficiently, scoping tools, and provisioning new servers. You'll automate IT processes and improve performance for upcoming chips while collaborating with the IT team on networking and setup.

The Technical Program Manager at Etched will oversee the collaboration between internal teams and external vendors to ensure successful delivery of AI datacenter hardware projects. Responsibilities include managing timelines, identifying risks, enhancing operational efficiency, and using KPIs for project success. The role demands exceptional leadership and communication skills, along with a solid understanding of hardware and ASIC design.