Top Tech Jobs & Startup Jobs

Design, develop, test, and maintain customer-facing software bridging hardware, firmware, and applications. Gather cross-functional requirements, implement solutions using Java/Kotlin/Python/TypeScript/React, troubleshoot system failures, participate in code reviews, and apply DevOps and testing best practices.

Support MOSFET validation, wafer-level and package-level FET characterization, test development and automation, NPI leadership, manufacturing/test issue resolution, yield and COGS improvement, and cross-functional coordination from tape-out to production release.

Define and validate digital mixed-signal architecture for power-management SoCs: ADC interfaces/controllers, front-end DSP, telemetry, emulation models, RTL-facing specs, firmware interfaces, and validation criteria. Collaborate cross-functionally to translate requirements into executable models, optimize tradeoffs, and document interfaces and validation evidence from model to silicon.

Lead global backend engineering for HPC SoC and MCU programs from RTL to GDS, ensuring implementation, signoff, PPA targets, and on-time tape-out. Build and scale distributed teams, standardize flows and metrics, improve execution predictability, and partner with foundries, EDA vendors, and cross-functional stakeholders.

Manage and enhance Altium's Salesforce platform: user/license administration, configuration (Flows, Process Builder, CPQ), data governance, integration work, audits, training, documentation, and stakeholder engagement to drive adoption and scalable solutions.

Lead analog design for complex CMOS power-management ICs: system interpretation, block design, simulation, layout supervision, lab evaluation, verification planning, DFT support, mentoring, customer engagement, and RFQ support to drive products to production.

Serve as trusted technical consultant for enterprise customers: run value-assessment workshops, recommend Altium/ECAD/PLM solutions, build business cases, create executive content, coordinate cross-functional delivery, and present value to decision-makers. Regular onsite travel to US/Europe.

Manage a major semiconductor account by building stakeholder relationships, qualifying requirements, presenting product roadmaps and demos, driving design-wins, coordinating RFQ responses with internal teams, tracking pipeline and forecasts, and identifying account expansion opportunities while staying current on customer roadmaps and competitive trends.

Responsible for verifying DDR6 data buffer chips, developing verification plans, test strategies, and optimizing verification environments using UVM methodology.

Lead the development of DDR5 and DDR6 PHY solutions, managing a team focused on high-speed memory interfaces, overseeing design and implementation, ensuring compliance with standards, and fostering technical excellence.