Top Tech Jobs & Startup Jobs

Lead global technical architecture and full development lifecycle for PMIC and analog/mixed-signal blocks. Collaborate with customers on system requirements, drive verification/DFT strategies, mentor engineers, and ensure production readiness while improving company-wide engineering methodologies and roadmaps.

Lead architecture and full development lifecycle of PMIC and mixed-signal analog blocks from specification through design, simulation, silicon verification, and production readiness. Serve as global technical authority, mentor engineers, collaborate with customers on system requirements, oversee verification/DFT and lab evaluation, and drive company-wide engineering methodology and roadmap improvements aligned with CMOS process trends.

Lead architectural evolution and full development lifecycle of PMIC and mixed-signal blocks, provide global technical authority, collaborate with customers on system requirements, oversee verification/DFT and lab evaluation, mentor engineers, and drive company-wide engineering methodology and roadmap improvements.

Lead design and development of advanced package and interconnect methods for power SiP/modules, WLCSP, flip-chip LGA and multi-chip modules. Drive wafer-level processes (Cu RDL, thinning, backside metal), define substrate and interconnect requirements, qualify materials and OSAT/CM processes, run DOE and SPC, resolve process integration issues, and support production ramp and quality for consumer, industrial, and automotive power applications.

Architects, designs, verifies, and optimizes CMOS analog blocks and high-speed DDR5/DDR6 I/O interfaces for custom ASICs. Analyzes silicon ATE and bench data, performs simulations, ensures signal integrity and circuit reliability, and collaborates with digital, systems, verification, validation, and test teams. Provides technical leadership and mentorship, documents designs, and ensures layouts meet analog matching and performance standards while satisfying power, area, and timeline constraints.

Lead product quality for new product introduction and volume ramp of PCP products for AI datacenters. Drive continuous improvement, analyze DPPM and customer returns, ensure customer-specific quality requirements and audit readiness, lead cross-functional problem solving, manage supplier excursions and escalations, and represent the business on external standards committees.

Lead and technically drive development of configurable mixed-signal ASICs: define architecture and IP requirements, create verification plans, coordinate cross-functional teams (test, qualification, QA), ensure best practices and documentation, and mentor a team of analog designers to product release.

Leads a global test engineering organization responsible for end-to-end test strategy, including DFT, characterization, qualification, wafer sort, final test, production release, and sustaining. Owns test cost, yield, quality, capacity planning, and manufacturing readiness for semiconductor power products. Partners cross-functionally to resolve test escapes, yield excursions, and customer returns while driving ATE standardization, automation, data systems, and AI-enabled engineering practices. Develops technical leaders and ensures predictable NPI execution and high-volume production success.

Lead architecture, design, simulation, verification and validation of CMOS analog blocks for custom ASICs (Rx, Tx, PLL, bandgap, high-speed mixed-signal). Optimize DDR I/O interfaces, ensure signal integrity, low-power operation, EM/IR/aging reliability, and high-quality layouts. Provide technical leadership, mentor junior engineers, collaborate with digital and systems teams, and produce thorough documentation and design verification.

Lead architecture, design, simulation, verification, and layout of high-performance CMOS analog blocks (Rx, Tx, PLL, bandgap) for custom ASICs. Optimize high-speed DDR I/O and receiver circuits (CTLE, VGA, DFE, slicer), ensure signal integrity, low-power operation, reliability (EM/IR/aging), mentor junior engineers, and produce design documentation.